diff options
Diffstat (limited to 'target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch b/target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch index 1e1f299766..5500861c22 100644 --- a/target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch +++ b/target/linux/lantiq/patches-3.14/0018-MTD-nand-lots-of-xrx200-fixes.patch @@ -8,8 +8,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org> drivers/mtd/nand/xway_nand.c | 63 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) -diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c -index e430f2d..fedf2c4 100644 --- a/drivers/mtd/nand/xway_nand.c +++ b/drivers/mtd/nand/xway_nand.c @@ -54,8 +54,27 @@ @@ -40,7 +38,7 @@ index e430f2d..fedf2c4 100644 static void xway_reset_chip(struct nand_chip *chip) { unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W; -@@ -86,12 +105,24 @@ static void xway_select_chip(struct mtd_info *mtd, int chip) +@@ -86,12 +105,24 @@ static void xway_select_chip(struct mtd_ case -1: ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON); ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON); @@ -65,7 +63,7 @@ index e430f2d..fedf2c4 100644 break; default: BUG(); -@@ -103,6 +134,12 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +@@ -103,6 +134,12 @@ static void xway_cmd_ctrl(struct mtd_inf struct nand_chip *this = mtd->priv; unsigned long nandaddr = (unsigned long) this->IO_ADDR_W; @@ -78,7 +76,7 @@ index e430f2d..fedf2c4 100644 if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CLE) xway_latchcmd = NAND_WRITE_CMD; -@@ -115,6 +152,24 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +@@ -115,6 +152,24 @@ static void xway_cmd_ctrl(struct mtd_inf while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) ; } @@ -103,7 +101,7 @@ index e430f2d..fedf2c4 100644 } static int xway_dev_ready(struct mtd_info *mtd) -@@ -157,6 +212,8 @@ static int xway_nand_probe(struct platform_device *pdev) +@@ -157,6 +212,8 @@ static int xway_nand_probe(struct platfo { struct nand_chip *this = platform_get_drvdata(pdev); unsigned long nandaddr = (unsigned long) this->IO_ADDR_W; @@ -112,7 +110,7 @@ index e430f2d..fedf2c4 100644 const __be32 *cs = of_get_property(pdev->dev.of_node, "lantiq,cs", NULL); u32 cs_flag = 0; -@@ -165,6 +222,12 @@ static int xway_nand_probe(struct platform_device *pdev) +@@ -165,6 +222,12 @@ static int xway_nand_probe(struct platfo if (cs && (*cs == 1)) cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1; @@ -125,6 +123,3 @@ index e430f2d..fedf2c4 100644 /* setup the EBU to run in NAND mode on our base addr */ ltq_ebu_w32(CPHYSADDR(nandaddr) | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1); --- -1.7.10.4 - |