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Diffstat (limited to 'target/linux/lantiq/patches-3.10/0028-pinctrl-lantiq-add-missing-pin-definition-to-falcon-.patch')
-rw-r--r--target/linux/lantiq/patches-3.10/0028-pinctrl-lantiq-add-missing-pin-definition-to-falcon-.patch63
1 files changed, 63 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.10/0028-pinctrl-lantiq-add-missing-pin-definition-to-falcon-.patch b/target/linux/lantiq/patches-3.10/0028-pinctrl-lantiq-add-missing-pin-definition-to-falcon-.patch
new file mode 100644
index 0000000000..5a56dae9e0
--- /dev/null
+++ b/target/linux/lantiq/patches-3.10/0028-pinctrl-lantiq-add-missing-pin-definition-to-falcon-.patch
@@ -0,0 +1,63 @@
+From 1036e254e670d7c8470aab812167e3d44ff993c1 Mon Sep 17 00:00:00 2001
+From: Thomas Langer <thomas.langer@lantiq.com>
+Date: Fri, 9 Aug 2013 20:38:14 +0200
+Subject: [PATCH 28/34] pinctrl/lantiq: add missing pin definition to falcon
+ pinctrl driver
+
+The pps pin definition is missing in the current code.
+
+Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
+Acked-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/pinctrl/pinctrl-falcon.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
+index f9b2a1d..4e731f2 100644
+--- a/drivers/pinctrl/pinctrl-falcon.c
++++ b/drivers/pinctrl/pinctrl-falcon.c
+@@ -75,6 +75,7 @@ enum falcon_mux {
+ FALCON_MUX_GPIO = 0,
+ FALCON_MUX_RST,
+ FALCON_MUX_NTR,
++ FALCON_MUX_PPS,
+ FALCON_MUX_MDIO,
+ FALCON_MUX_LED,
+ FALCON_MUX_SPI,
+@@ -114,7 +115,7 @@ static struct ltq_mfp_pin falcon_mfp[] = {
+ MFP_FALCON(GPIO2, GPIO, GPIO, NONE, NONE),
+ MFP_FALCON(GPIO3, GPIO, GPIO, NONE, NONE),
+ MFP_FALCON(GPIO4, NTR, GPIO, NONE, NONE),
+- MFP_FALCON(GPIO5, NTR, GPIO, NONE, NONE),
++ MFP_FALCON(GPIO5, NTR, GPIO, PPS, NONE),
+ MFP_FALCON(GPIO6, RST, GPIO, NONE, NONE),
+ MFP_FALCON(GPIO7, MDIO, GPIO, NONE, NONE),
+ MFP_FALCON(GPIO8, MDIO, GPIO, NONE, NONE),
+@@ -168,6 +169,7 @@ static struct ltq_mfp_pin falcon_mfp[] = {
+ static const unsigned pins_por[] = {GPIO0};
+ static const unsigned pins_ntr[] = {GPIO4};
+ static const unsigned pins_ntr8k[] = {GPIO5};
++static const unsigned pins_pps[] = {GPIO5};
+ static const unsigned pins_hrst[] = {GPIO6};
+ static const unsigned pins_mdio[] = {GPIO7, GPIO8};
+ static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11,
+@@ -186,6 +188,7 @@ static struct ltq_pin_group falcon_grps[] = {
+ GRP_MUX("por", RST, pins_por),
+ GRP_MUX("ntr", NTR, pins_ntr),
+ GRP_MUX("ntr8k", NTR, pins_ntr8k),
++ GRP_MUX("pps", PPS, pins_pps),
+ GRP_MUX("hrst", RST, pins_hrst),
+ GRP_MUX("mdio", MDIO, pins_mdio),
+ GRP_MUX("bootled", LED, pins_bled),
+@@ -201,7 +204,7 @@ static struct ltq_pin_group falcon_grps[] = {
+ };
+
+ static const char * const ltq_rst_grps[] = {"por", "hrst"};
+-static const char * const ltq_ntr_grps[] = {"ntr", "ntr8k"};
++static const char * const ltq_ntr_grps[] = {"ntr", "ntr8k", "pps"};
+ static const char * const ltq_mdio_grps[] = {"mdio"};
+ static const char * const ltq_bled_grps[] = {"bootled"};
+ static const char * const ltq_asc_grps[] = {"asc0", "asc1"};
+--
+1.7.10.4
+