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-rw-r--r--target/linux/lantiq/patches-3.0/420-spi3.patch89
1 files changed, 89 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.0/420-spi3.patch b/target/linux/lantiq/patches-3.0/420-spi3.patch
new file mode 100644
index 0000000000..62b68d343e
--- /dev/null
+++ b/target/linux/lantiq/patches-3.0/420-spi3.patch
@@ -0,0 +1,89 @@
+From: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
+Date: Thu, 3 Mar 2011 20:42:26 +0000 (+0100)
+Subject: MIPS: lantiq: Add device register helper for SPI controller and devices
+X-Git-Url: http://nbd.name/gitweb.cgi?p=lantiq.git;a=commitdiff_plain;h=b35b07062b718ece9b9cb7b23b12d83a087eafb0;hp=653c95b8b9066c9c6ac08bd64d0ceee439e9fd90
+
+MIPS: lantiq: Add device register helper for SPI controller and devices
+
+Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
+---
+
+--- a/arch/mips/lantiq/xway/devices.h
++++ b/arch/mips/lantiq/xway/devices.h
+@@ -11,10 +11,13 @@
+
+ #include "../devices.h"
+ #include <linux/phy.h>
++#include <linux/spi/spi.h>
+
+ extern void ltq_register_gpio(void);
+ extern void ltq_register_gpio_stp(void);
+ extern void ltq_register_ase_asc(void);
+ extern void ltq_register_etop(struct ltq_eth_data *eth);
++extern void ltq_register_spi(struct ltq_spi_platform_data *pdata,
++ struct spi_board_info const *info, unsigned n);
+
+ #endif
+--- a/arch/mips/lantiq/xway/devices.c
++++ b/arch/mips/lantiq/xway/devices.c
+@@ -21,6 +21,7 @@
+ #include <linux/io.h>
+ #include <linux/gpio.h>
+ #include <linux/leds.h>
++#include <linux/spi/spi.h>
+
+ #include <asm/bootinfo.h>
+ #include <asm/irq.h>
+@@ -119,3 +120,41 @@
+ platform_device_register(&ltq_etop);
+ }
+ }
++
++static struct resource ltq_spi_resources[] = {
++ {
++ .start = LTQ_SSC_BASE_ADDR,
++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ IRQ_RES(spi_tx, LTQ_SSC_TIR),
++ IRQ_RES(spi_rx, LTQ_SSC_RIR),
++ IRQ_RES(spi_err, LTQ_SSC_EIR),
++};
++
++static struct resource ltq_spi_resources_ar9[] = {
++ {
++ .start = LTQ_SSC_BASE_ADDR,
++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ IRQ_RES(spi_tx, LTQ_SSC_TIR_AR9),
++ IRQ_RES(spi_rx, LTQ_SSC_RIR_AR9),
++ IRQ_RES(spi_err, LTQ_SSC_EIR),
++};
++
++static struct platform_device ltq_spi = {
++ .name = "ltq-spi",
++ .resource = ltq_spi_resources,
++ .num_resources = ARRAY_SIZE(ltq_spi_resources),
++};
++
++void __init ltq_register_spi(struct ltq_spi_platform_data *pdata,
++ struct spi_board_info const *info, unsigned n)
++{
++ if(ltq_is_ar9())
++ ltq_spi.resource = ltq_spi_resources_ar9;
++ spi_register_board_info(info, n);
++ ltq_spi.dev.platform_data = pdata;
++ platform_device_register(&ltq_spi);
++}
+--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
+@@ -27,6 +27,8 @@
+
+ #define LTQ_SSC_TIR (INT_NUM_IM0_IRL0 + 15)
+ #define LTQ_SSC_RIR (INT_NUM_IM0_IRL0 + 14)
++#define LTQ_SSC_TIR_AR9 (INT_NUM_IM0_IRL0 + 14)
++#define LTQ_SSC_RIR_AR9 (INT_NUM_IM0_IRL0 + 15)
+ #define LTQ_SSC_EIR (INT_NUM_IM0_IRL0 + 16)
+
+ #define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21)