diff options
Diffstat (limited to 'target/linux/ipq807x/patches-5.15')
5 files changed, 9 insertions, 122 deletions
diff --git a/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch b/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch deleted file mode 100644 index 6a525f2c3e..0000000000 --- a/target/linux/ipq807x/patches-5.15/0048-v6.1-clk-qcom-reset-Allow-specifying-custom-reset-delay.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 72bc31aa621e21a7c36a7da8aa6f6a77bb234e0b Mon Sep 17 00:00:00 2001 -From: Stephan Gerhold <stephan.gerhold@kernkonzept.com> -Date: Wed, 6 Jul 2022 15:41:29 +0200 -Subject: [PATCH] clk: qcom: reset: Allow specifying custom reset delay - -The amount of time required between asserting and deasserting the reset -signal can vary depending on the involved hardware component. Sometimes -1 us might not be enough and a larger delay is necessary to conform to -the specifications. - -Usually this is worked around in the consuming drivers, by replacing -reset_control_reset() with a sequence of reset_control_assert(), waiting -for a custom delay, followed by reset_control_deassert(). - -However, in some cases the driver making use of the reset is generic and -can be used with different reset controllers. In this case the reset -time requirement is better handled directly by the reset controller -driver. - -Make this possible by adding an "udelay" field to the qcom_reset_map -that allows setting a different reset delay (in microseconds). - -Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> -Signed-off-by: Bjorn Andersson <andersson@kernel.org> -Link: https://lore.kernel.org/r/20220706134132.3623415-4-stephan.gerhold@kernkonzept.com ---- - drivers/clk/qcom/reset.c | 4 +++- - drivers/clk/qcom/reset.h | 1 + - 2 files changed, 4 insertions(+), 1 deletion(-) - ---- a/drivers/clk/qcom/reset.c -+++ b/drivers/clk/qcom/reset.c -@@ -13,8 +13,10 @@ - - static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id) - { -+ struct qcom_reset_controller *rst = to_qcom_reset_controller(rcdev); -+ - rcdev->ops->assert(rcdev, id); -- udelay(1); -+ udelay(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */ - rcdev->ops->deassert(rcdev, id); - return 0; - } ---- a/drivers/clk/qcom/reset.h -+++ b/drivers/clk/qcom/reset.h -@@ -11,6 +11,7 @@ - struct qcom_reset_map { - unsigned int reg; - u8 bit; -+ u8 udelay; - }; - - struct regmap; diff --git a/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch b/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch deleted file mode 100644 index e0725a6612..0000000000 --- a/target/linux/ipq807x/patches-5.15/0049-v6.2-clk-qcom-reset-support-resetting-multiple-bits.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 813ba3e427671ba3ff35c825087b03f0ad91cf02 Mon Sep 17 00:00:00 2001 -From: Robert Marko <robimarko@gmail.com> -Date: Mon, 7 Nov 2022 14:28:59 +0100 -Subject: [PATCH] clk: qcom: reset: support resetting multiple bits - -This patch adds the support for giving the complete bitmask -in reset structure and reset operation will use this bitmask -for all reset operations. - -Currently, reset structure only takes a single bit for each reset -and then calculates the bitmask by using the BIT() macro. - -However, this is not sufficient anymore for newer SoC-s like IPQ8074, -IPQ6018 and more, since their networking resets require multiple bits -to be asserted in order to properly reset the HW block completely. - -So, in order to allow asserting multiple bits add "bitmask" field to -qcom_reset_map, and then use that bitmask value if its populated in the -driver, if its not populated, then we just default to existing behaviour -and calculate the bitmask on the fly. - -Signed-off-by: Robert Marko <robimarko@gmail.com> -Signed-off-by: Bjorn Andersson <andersson@kernel.org> -Link: https://lore.kernel.org/r/20221107132901.489240-1-robimarko@gmail.com ---- - drivers/clk/qcom/reset.c | 4 ++-- - drivers/clk/qcom/reset.h | 1 + - 2 files changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/clk/qcom/reset.c -+++ b/drivers/clk/qcom/reset.c -@@ -30,7 +30,7 @@ qcom_reset_assert(struct reset_controlle - - rst = to_qcom_reset_controller(rcdev); - map = &rst->reset_map[id]; -- mask = BIT(map->bit); -+ mask = map->bitmask ? map->bitmask : BIT(map->bit); - - return regmap_update_bits(rst->regmap, map->reg, mask, mask); - } -@@ -44,7 +44,7 @@ qcom_reset_deassert(struct reset_control - - rst = to_qcom_reset_controller(rcdev); - map = &rst->reset_map[id]; -- mask = BIT(map->bit); -+ mask = map->bitmask ? map->bitmask : BIT(map->bit); - - return regmap_update_bits(rst->regmap, map->reg, mask, 0); - } ---- a/drivers/clk/qcom/reset.h -+++ b/drivers/clk/qcom/reset.h -@@ -12,6 +12,7 @@ struct qcom_reset_map { - unsigned int reg; - u8 bit; - u8 udelay; -+ u32 bitmask; - }; - - struct regmap; diff --git a/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch b/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch index b29512fb76..817a3c64c9 100644 --- a/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch +++ b/target/linux/ipq807x/patches-5.15/0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch @@ -30,7 +30,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org> struct qcom_pcie { struct dw_pcie *pci; void __iomem *parf; /* DT parf */ -@@ -1467,6 +1471,38 @@ static const struct qcom_pcie_ops ops_1_ +@@ -1469,6 +1473,38 @@ static const struct qcom_pcie_ops ops_1_ .config_sid = qcom_pcie_config_sid_sm8250, }; @@ -69,7 +69,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org> static const struct dw_pcie_ops dw_pcie_ops = { .link_up = qcom_pcie_link_up, .start_link = qcom_pcie_start_link, -@@ -1478,6 +1514,7 @@ static int qcom_pcie_probe(struct platfo +@@ -1480,6 +1516,7 @@ static int qcom_pcie_probe(struct platfo struct pcie_port *pp; struct dw_pcie *pci; struct qcom_pcie *pcie; @@ -77,7 +77,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org> int ret; pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); -@@ -1499,7 +1536,13 @@ static int qcom_pcie_probe(struct platfo +@@ -1501,7 +1538,13 @@ static int qcom_pcie_probe(struct platfo pcie->pci = pci; @@ -92,7 +92,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org> pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); if (IS_ERR(pcie->reset)) { -@@ -1555,16 +1598,17 @@ err_pm_runtime_put: +@@ -1557,16 +1600,17 @@ err_pm_runtime_put: } static const struct of_device_id qcom_pcie_match[] = { diff --git a/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch b/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch index af8ba2a4e1..6881ed6d25 100644 --- a/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch +++ b/target/linux/ipq807x/patches-5.15/0077-v6.0-PCI-qcom-Add-IPQ60xx-support.patch @@ -70,7 +70,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> }; struct qcom_pcie; -@@ -1280,6 +1290,112 @@ static void qcom_pcie_post_deinit_2_7_0( +@@ -1282,6 +1292,112 @@ static void qcom_pcie_post_deinit_2_7_0( clk_disable_unprepare(res->pipe_clk); } @@ -183,7 +183,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> static int qcom_pcie_link_up(struct dw_pcie *pci) { u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); -@@ -1471,6 +1587,15 @@ static const struct qcom_pcie_ops ops_1_ +@@ -1473,6 +1589,15 @@ static const struct qcom_pcie_ops ops_1_ .config_sid = qcom_pcie_config_sid_sm8250, }; @@ -199,7 +199,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> static const struct qcom_pcie_cfg apq8084_cfg = { .ops = &ops_1_0_0, }; -@@ -1503,6 +1628,10 @@ static const struct qcom_pcie_cfg sc7280 +@@ -1505,6 +1630,10 @@ static const struct qcom_pcie_cfg sc7280 .ops = &ops_1_9_0, }; @@ -210,7 +210,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> static const struct dw_pcie_ops dw_pcie_ops = { .link_up = qcom_pcie_link_up, .start_link = qcom_pcie_start_link, -@@ -1609,6 +1738,7 @@ static const struct of_device_id qcom_pc +@@ -1611,6 +1740,7 @@ static const struct of_device_id qcom_pc { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg }, { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg }, { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg }, diff --git a/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch b/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch index c7a7e7ab49..ae6b148210 100644 --- a/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch +++ b/target/linux/ipq807x/patches-5.15/0107-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch @@ -13,7 +13,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com> --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -1733,6 +1733,7 @@ static const struct of_device_id qcom_pc +@@ -1735,6 +1735,7 @@ static const struct of_device_id qcom_pc { .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg }, { .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg }, { .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg }, |