diff options
Diffstat (limited to 'target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch')
| -rw-r--r-- | target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch b/target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch new file mode 100644 index 0000000000..58dfba6e9c --- /dev/null +++ b/target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch @@ -0,0 +1,52 @@ +From 1bfcec16a591622b4993c043e6cc4d07f3690767 Mon Sep 17 00:00:00 2001 +From: Robert Marko <robimarko@gmail.com> +Date: Sun, 8 Jan 2023 13:39:55 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq8074: correct USB3 QMP PHY-s clock + output names + +It seems that clock-output-names for the USB3 QMP PHY-s where set without +actually checking what is the GCC clock driver expecting, so clock core +could never actually find the parents for usb0_pipe_clk_src and +usb1_pipe_clk_src clocks in the GCC driver. + +So, correct the names to be what the driver expects so that parenting +works. + +Before: +gcc_usb0_pipe_clk_src 0 0 0 125000000 0 0 50000 Y +gcc_usb1_pipe_clk_src 0 0 0 125000000 0 0 50000 Y + +After: + usb3phy_0_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y + usb0_pipe_clk_src 1 1 0 125000000 0 0 50000 Y + gcc_usb0_pipe_clk 1 1 0 125000000 0 0 50000 Y + usb3phy_1_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y + usb1_pipe_clk_src 1 1 0 125000000 0 0 50000 Y + gcc_usb1_pipe_clk 1 1 0 125000000 0 0 50000 Y + +Fixes: 5e09bc51d07b ("arm64: dts: ipq8074: enable USB support") +Signed-off-by: Robert Marko <robimarko@gmail.com> +--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -263,7 +263,7 @@ + #clock-cells = <0>; + clocks = <&gcc GCC_USB1_PIPE_CLK>; + clock-names = "pipe0"; +- clock-output-names = "gcc_usb1_pipe_clk_src"; ++ clock-output-names = "usb3phy_1_cc_pipe_clk"; + }; + }; + +@@ -306,7 +306,7 @@ + #clock-cells = <0>; + clocks = <&gcc GCC_USB0_PIPE_CLK>; + clock-names = "pipe0"; +- clock-output-names = "gcc_usb0_pipe_clk_src"; ++ clock-output-names = "usb3phy_0_cc_pipe_clk"; + }; + }; + |