diff options
Diffstat (limited to 'target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch')
| -rw-r--r-- | target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch b/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch new file mode 100644 index 0000000000..d7d31cae89 --- /dev/null +++ b/target/linux/ipq807x/patches-5.15/0012-v5.19-arm64-dts-qcom-align-dmas-in-I2C-SPI-UART-with-DT-sc.patch @@ -0,0 +1,61 @@ +From 6f39b05b13e7be39919fd8d235bb0e63ecabf190 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Date: Tue, 5 Apr 2022 08:34:43 +0200 +Subject: [PATCH] arm64: dts: qcom: align dmas in I2C/SPI/UART with DT schema + +The DT schema expects dma channels in tx-rx order. No functional +change. + +Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> +Link: https://lore.kernel.org/r/20220405063451.12011-2-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -471,8 +471,8 @@ + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <400000>; +- dmas = <&blsp_dma 15>, <&blsp_dma 14>; +- dma-names = "rx", "tx"; ++ dmas = <&blsp_dma 14>, <&blsp_dma 15>; ++ dma-names = "tx", "rx"; + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "disabled"; +@@ -488,8 +488,8 @@ + <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <100000>; +- dmas = <&blsp_dma 17>, <&blsp_dma 16>; +- dma-names = "rx", "tx"; ++ dmas = <&blsp_dma 16>, <&blsp_dma 17>; ++ dma-names = "tx", "rx"; + status = "disabled"; + }; + +@@ -503,8 +503,8 @@ + <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <400000>; +- dmas = <&blsp_dma 21>, <&blsp_dma 20>; +- dma-names = "rx", "tx"; ++ dmas = <&blsp_dma 20>, <&blsp_dma 21>; ++ dma-names = "tx", "rx"; + status = "disabled"; + }; + +@@ -518,8 +518,8 @@ + <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <100000>; +- dmas = <&blsp_dma 23>, <&blsp_dma 22>; +- dma-names = "rx", "tx"; ++ dmas = <&blsp_dma 22>, <&blsp_dma 23>; ++ dma-names = "tx", "rx"; + status = "disabled"; + }; + |