diff options
Diffstat (limited to 'target/linux/ipq807x/files/arch')
| -rw-r--r-- | target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts | 73 | ||||
| -rw-r--r-- | target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi | 311 |
2 files changed, 384 insertions, 0 deletions
diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts new file mode 100644 index 0000000000..f3e82e2251 --- /dev/null +++ b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */ + +/dts-v1/; + +#include "ipq8071-ax3600.dtsi" + +/ { + model = "Xiaomi AX3600"; + compatible = "xiaomi,ax3600", "qcom,ipq8074"; + + leds { + compatible = "gpio-leds"; + + led_system_blue: system-blue { + label = "blue:system"; + gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; + }; + + led_system_yellow: system-yellow { + label = "yellow:system"; + gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; + }; + + network-yellow { + label = "yellow:network"; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + }; + + network-blue { + label = "blue:network"; + gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; + }; + + aiot { + label = "blue:aiot"; + gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + }; +}; + +&pcie_qmp0 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 52 GPIO_ACTIVE_HIGH>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi0: wifi@1,0 { + status = "okay"; + + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + + qcom,ath10k-calibration-variant = "Xiaomi-AX3600"; + nvmem-cell-names = "calibration"; + nvmem-cells = <&caldata_qca9889>; + }; + }; +}; + +&wifi { + qcom,ath11k-calibration-variant = "Xiaomi-AX3600"; +}; diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi new file mode 100644 index 0000000000..c18cef52f3 --- /dev/null +++ b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */ + +#include "ipq8074-512m.dtsi" +#include "ipq8074-ac-cpu.dtsi" +#include "ipq8074-ess.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + aliases { + serial0 = &blsp1_uart5; + led-boot = &led_system_yellow; + led-failsafe = &led_system_yellow; + led-running = &led_system_blue; + led-upgrade = &led_system_yellow; + label-mac-device = &dp2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_0"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&tlmm { + mdio_pins: mdio-pins { + mdc { + pins = "gpio68"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio69"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&blsp1_uart5 { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + /* + * Bootloader will find the NAND DT node by the compatible and + * then "fixup" it by adding the partitions from the SMEM table + * using the legacy bindings thus making it impossible for us + * to change the partition table or utilize NVMEM for calibration. + * So add a dummy partitions node that bootloader will populate + * and set it as disabled so the kernel ignores it instead of + * printing warnings due to the broken way bootloader adds the + * partitions. + */ + partitions { + status = "disabled"; + }; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "0:mibib"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "0:qsee"; + reg = <0x200000 0x300000>; + read-only; + }; + + partition@500000 { + label = "0:devcfg"; + reg = <0x500000 0x80000>; + read-only; + }; + + partition@580000 { + label = "0:rpm"; + reg = <0x580000 0x80000>; + read-only; + }; + + partition@600000 { + label = "0:cdt"; + reg = <0x600000 0x80000>; + read-only; + }; + + partition@680000 { + label = "0:appsblenv"; + reg = <0x680000 0x80000>; + }; + + partition@700000 { + label = "0:appsbl"; + reg = <0x700000 0x100000>; + read-only; + }; + + partition@800000 { + label = "0:art"; + reg = <0x800000 0x80000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_dp2: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_dp3: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_dp4: macaddr@12 { + reg = <0x12 0x6>; + }; + + macaddr_dp5: macaddr@18 { + reg = <0x18 0x6>; + }; + + caldata_qca9889: caldata@4d000 { + reg = <0x33000 0x844>; + }; + }; + + partition@880000 { + label = "bdata"; + reg = <0x880000 0x80000>; + }; + + partition@900000 { + /* This is crash + crash_syslog parts combined */ + label = "pstore"; + reg = <0x900000 0x100000>; + }; + + /* Make the first rootfs a dedicated ubi partition for kernel */ + partition@a00000 { + label = "ubi_kernel"; + reg = <0xa00000 0x23c0000>; + }; + + /* Place the real rootfs in the original second rootfs and + * expand it to the end of the nand + */ + rootfs: partition@2dc0000 { + label = "rootfs"; + reg = <0x2dc0000 0xd240000>; + }; + }; + }; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + + qca8075_4: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + }; +}; + +&switch { + status = "okay"; + + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x1e>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + bm_tick_mode = <0>; /* bm tick mode */ + tm_tick_mode = <0>; /* tm tick mode */ + + qcom,port_phyinfo { + port@0 { + port_id = <1>; + phy_address = <0>; + }; + port@1 { + port_id = <2>; + phy_address = <1>; + }; + port@2 { + port_id = <3>; + phy_address = <2>; + }; + port@3 { + port_id = <4>; + phy_address = <3>; + }; + port@4 { + port_id = <5>; + phy_address = <4>; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "wan"; + nvmem-cells = <&macaddr_dp2>; + nvmem-cell-names = "mac-address"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan1"; + nvmem-cells = <&macaddr_dp3>; + nvmem-cell-names = "mac-address"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan2"; + nvmem-cells = <&macaddr_dp4>; + nvmem-cell-names = "mac-address"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8075_4>; + label = "lan3"; + nvmem-cells = <&macaddr_dp5>; + nvmem-cell-names = "mac-address"; +}; + +&wifi { + status = "okay"; + + qcom,ath11k-fw-memory-mode = <1>; +}; |