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-rw-r--r--target/linux/ipq806x/patches/0151-ARM-ipq8064-Add-nand-device-info.patch108
1 files changed, 0 insertions, 108 deletions
diff --git a/target/linux/ipq806x/patches/0151-ARM-ipq8064-Add-nand-device-info.patch b/target/linux/ipq806x/patches/0151-ARM-ipq8064-Add-nand-device-info.patch
deleted file mode 100644
index b460454352..0000000000
--- a/target/linux/ipq806x/patches/0151-ARM-ipq8064-Add-nand-device-info.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 4490cfa66379909cdddc3518c8e75b7cd26d8f69 Mon Sep 17 00:00:00 2001
-From: Andy Gross <agross@codeaurora.org>
-Date: Mon, 16 Jun 2014 16:53:49 -0500
-Subject: [PATCH 151/182] ARM: ipq8064: Add nand device info
-
-Signed-off-by: Andy Gross <agross@codeaurora.org>
----
- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 34 ++++++++++++++++++++++++++++++
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++
- 2 files changed, 67 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -45,6 +45,29 @@
- bias-none;
- };
- };
-+ nand_pins: nand_pins {
-+ mux {
-+ pins = "gpio34", "gpio35", "gpio36",
-+ "gpio37", "gpio38", "gpio39",
-+ "gpio40", "gpio41", "gpio42",
-+ "gpio43", "gpio44", "gpio45",
-+ "gpio46", "gpio47";
-+ function = "nand";
-+ drive-strength = <10>;
-+ bias-disable;
-+ };
-+ pullups {
-+ pins = "gpio39";
-+ bias-pull-up;
-+ };
-+ hold {
-+ pins = "gpio40", "gpio41", "gpio42",
-+ "gpio43", "gpio44", "gpio45",
-+ "gpio46", "gpio47";
-+ bias-bus-hold;
-+ };
-+ };
-+
- };
-
- gsbi@16300000 {
-@@ -126,5 +149,16 @@
- sata@29000000 {
- status = "ok";
- };
-+
-+ dma@18300000 {
-+ status = "ok";
-+ };
-+
-+ nand@0x1ac00000 {
-+ status = "ok";
-+
-+ pinctrl-0 = <&nand_pins>;
-+ pinctrl-names = "default";
-+ };
- };
- };
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -76,6 +76,7 @@
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0 32 0x4>;
-+
- };
-
- intc: interrupt-controller@2000000 {
-@@ -369,5 +370,37 @@
- phy-names = "sata-phy";
- status = "disabled";
- };
-+
-+ adm_dma: dma@18300000 {
-+ compatible = "qcom,adm";
-+ reg = <0x18300000 0x100000>;
-+ interrupts = <0 170 0>;
-+
-+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
-+ clock-names = "core_clk", "iface_clk";
-+
-+ resets = <&gcc ADM0_RESET>,
-+ <&gcc ADM0_PBUS_RESET>,
-+ <&gcc ADM0_C0_RESET>,
-+ <&gcc ADM0_C1_RESET>,
-+ <&gcc ADM0_C2_RESET>;
-+
-+ reset-names = "adm", "pbus", "c0", "c1", "c2";
-+
-+ status = "disabled";
-+ };
-+
-+ nand@0x1ac00000 {
-+ compatible = "qcom,qcom_nand";
-+ reg = <0x1ac00000 0x800>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+
-+ clocks = <&gcc EBI2_CLK>;
-+ clock-names = "core_clk";
-+
-+
-+ status = "disabled";
-+ };
- };
- };