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Diffstat (limited to 'target/linux/ipq806x/patches-5.15/104-v6.0-02-ARM-dts-qcom-ipq8064-add-gsbi6-missing-definition.patch')
-rw-r--r--target/linux/ipq806x/patches-5.15/104-v6.0-02-ARM-dts-qcom-ipq8064-add-gsbi6-missing-definition.patch67
1 files changed, 67 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.15/104-v6.0-02-ARM-dts-qcom-ipq8064-add-gsbi6-missing-definition.patch b/target/linux/ipq806x/patches-5.15/104-v6.0-02-ARM-dts-qcom-ipq8064-add-gsbi6-missing-definition.patch
new file mode 100644
index 0000000000..1f4e288fb8
--- /dev/null
+++ b/target/linux/ipq806x/patches-5.15/104-v6.0-02-ARM-dts-qcom-ipq8064-add-gsbi6-missing-definition.patch
@@ -0,0 +1,67 @@
+From d883a12a547b6d42e795ff3b5ac87cfd013b5423 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Thu, 7 Jul 2022 03:09:36 +0200
+Subject: [PATCH 2/8] ARM: dts: qcom: ipq8064: add gsbi6 missing definition
+
+Add gsbi6 missing definition for ipq8064.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Tested-by: Jonathan McDowell <noodles@earth.li>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 43 +++++++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -663,6 +663,49 @@
+ };
+ };
+
++ gsbi6: gsbi@16500000 {
++ compatible = "qcom,gsbi-v1.0.0";
++ reg = <0x16500000 0x100>;
++ cell-index = <6>;
++ clocks = <&gcc GSBI6_H_CLK>;
++ clock-names = "iface";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++
++ syscon-tcsr = <&tcsr>;
++
++ status = "disabled";
++
++ gsbi6_i2c: i2c@16580000 {
++ compatible = "qcom,i2c-qup-v1.1.1";
++ reg = <0x16580000 0x1000>;
++ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
++
++ clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
++ clock-names = "core", "iface";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "disabled";
++ };
++
++ gsbi6_spi: spi@16580000 {
++ compatible = "qcom,spi-qup-v1.1.1";
++ reg = <0x16580000 0x1000>;
++ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
++
++ clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
++ clock-names = "core", "iface";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "disabled";
++ };
++ };
++
+ gsbi7: gsbi@16600000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";