diff options
Diffstat (limited to 'target/linux/ipq806x/patches-5.15/100-v5.18-10-linux-next-clk-qcom-gcc-ipq806x-add-additional-freq-for-sdc-tab.patch')
-rw-r--r-- | target/linux/ipq806x/patches-5.15/100-v5.18-10-linux-next-clk-qcom-gcc-ipq806x-add-additional-freq-for-sdc-tab.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.15/100-v5.18-10-linux-next-clk-qcom-gcc-ipq806x-add-additional-freq-for-sdc-tab.patch b/target/linux/ipq806x/patches-5.15/100-v5.18-10-linux-next-clk-qcom-gcc-ipq806x-add-additional-freq-for-sdc-tab.patch new file mode 100644 index 0000000000..3bb5e57c87 --- /dev/null +++ b/target/linux/ipq806x/patches-5.15/100-v5.18-10-linux-next-clk-qcom-gcc-ipq806x-add-additional-freq-for-sdc-tab.patch @@ -0,0 +1,38 @@ +From 7e726f34c782b2ca28a29ca9870e34e4319d65bc Mon Sep 17 00:00:00 2001 +From: Ansuel Smith <ansuelsmth@gmail.com> +Date: Sat, 26 Feb 2022 14:52:30 +0100 +Subject: [PATCH 10/14] clk: qcom: gcc-ipq806x: add additional freq for sdc + table + +Add additional freq supported for the sdc table. The ops are changed to +the floor_ops to handle a freq request of 52kHz where we need to provide +a freq of 51.2kHz instead for stability reason. + +Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> +Reviewed-by: Stephen Boyd <sboyd@kernel.org> +Tested-by: Jonathan McDowell <noodles@earth.li> +Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> +Link: https://lore.kernel.org/r/20220226135235.10051-11-ansuelsmth@gmail.com +--- + drivers/clk/qcom/gcc-ipq806x.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/clk/qcom/gcc-ipq806x.c ++++ b/drivers/clk/qcom/gcc-ipq806x.c +@@ -1292,6 +1292,7 @@ static const struct freq_tbl clk_tbl_sdc + { 20210000, P_PLL8, 1, 1, 19 }, + { 24000000, P_PLL8, 4, 1, 4 }, + { 48000000, P_PLL8, 4, 1, 2 }, ++ { 51200000, P_PLL8, 1, 2, 15 }, + { 64000000, P_PLL8, 3, 1, 2 }, + { 96000000, P_PLL8, 4, 0, 0 }, + { 192000000, P_PLL8, 2, 0, 0 }, +@@ -1325,7 +1326,7 @@ static struct clk_rcg sdc1_src = { + .name = "sdc1_src", + .parent_data = gcc_pxo_pll8, + .num_parents = ARRAY_SIZE(gcc_pxo_pll8), +- .ops = &clk_rcg_ops, ++ .ops = &clk_rcg_floor_ops, + }, + } + }; |