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Diffstat (limited to 'target/linux/ipq40xx/patches-4.19/089-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch')
-rw-r--r--target/linux/ipq40xx/patches-4.19/089-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch36
1 files changed, 0 insertions, 36 deletions
diff --git a/target/linux/ipq40xx/patches-4.19/089-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch b/target/linux/ipq40xx/patches-4.19/089-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch
deleted file mode 100644
index 90e6b25538..0000000000
--- a/target/linux/ipq40xx/patches-4.19/089-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 04b3b72b5b8fdb883bfdc619cb29b03641b1cc6a Mon Sep 17 00:00:00 2001
-From: Robert Marko <robimarko@gmail.com>
-Date: Thu, 15 Aug 2019 19:28:23 +0200
-Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
-
-IPQ4019 has a built in SD/eMMC controller which is supported by the
-SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
-So lets add the appropriate node for it.
-
-Signed-off-by: Robert Marko <robimarko@gmail.com>
-Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -214,6 +214,18 @@
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- };
-
-+ sdhci: sdhci@7824900 {
-+ compatible = "qcom,sdhci-msm-v4";
-+ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
-+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "hc_irq", "pwr_irq";
-+ bus-width = <8>;
-+ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
-+ <&gcc GCC_DCD_XO_CLK>;
-+ clock-names = "core", "iface", "xo";
-+ status = "disabled";
-+ };
-+
- blsp_dma: dma@7884000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07884000 0x23000>;