diff options
Diffstat (limited to 'target/linux/ipq40xx/files-4.14')
6 files changed, 2221 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a42.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a42.dts new file mode 100644 index 0000000000..887be993e8 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a42.dts @@ -0,0 +1,244 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2017, Sven Eckelmann <sven.eckelmann@openmesh.com> + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include "qcom-ipq4019-bus.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/soc/qcom,tcsr.h> + +/ { + model = "OpenMesh A42"; + compatible = "openmesh,a42", "qcom,ipq4019"; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + rsvd1@87000000 { + reg = <0x87000000 0x500000>; + no-map; + }; + + wifi_dump@87500000 { + reg = <0x87500000 0x600000>; + no-map; + }; + + rsvd2@87B00000 { + reg = <0x87b00000 0x500000>; + no-map; + }; + }; + + soc { + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>; + status = "ok"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = <TCSR_ESS_PSGMII>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; + }; + + pinctrl@1000000 { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; + }; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + blsp_dma: dma@7884000 { + status = "ok"; + }; + + spi_0: spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + cs-gpios = <&tlmm 54 0>; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + /* partitions are passed via bootloader */ + }; + }; + + serial@78af000 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + cryptobam: dma@8e04000 { + status = "ok"; + }; + + crypto@8e3a000 { + status = "ok"; + }; + + watchdog@b017000 { + status = "ok"; + }; + + usb2_hs_phy: hsphy@a8000 { + status = "ok"; + }; + + usb2: usb2@60f8800 { + status = "ok"; + }; + + mdio@90000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + + wifi@a000000 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A42"; + }; + + wifi@a800000 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A42"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red { + label = "a42:red:status"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + power: green { + label = "a42:green:status"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + blue { + label = "a42:blue:status"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; +}; + +&gmac0 { + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <2 0x20>; +}; + +&gmac1 { + qcom,phy_mdio_addr = <3>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <1 0x10>; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts new file mode 100644 index 0000000000..47202d28fe --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts @@ -0,0 +1,21 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019-ap.dk04.1.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1"; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi new file mode 100644 index 0000000000..99fe8af633 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi @@ -0,0 +1,176 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; + compatible = "qcom,ipq4019"; + + soc { + pinctrl@1000000 { + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + }; + pinconf { + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + pinmux { + function = "blsp_i2c0"; + pins = "gpio10", "gpio11"; + }; + pinconf { + pins = "gpio10", "gpio11"; + drive-strength = <16>; + bias-disable; + }; + }; + + nand_pins: nand_pins { + + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + }; + + blsp_dma: dma@7884000 { + status = "ok"; + }; + + spi_0: spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + cs-gpios = <&tlmm 12 0>; + + mx25l25635e@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "mx25l25635e"; + spi-max-frequency = <24000000>; + }; + }; + + i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */ + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + + status = "ok"; + }; + + serial@78af000 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + serial@78b0000 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + usb3_ss_phy: ssphy@9a000 { + status = "ok"; + }; + + usb3_hs_phy: hsphy@a6000 { + status = "ok"; + }; + + usb3: usb3@8af8800 { + status = "ok"; + }; + + usb2_hs_phy: hsphy@a8000 { + status = "ok"; + }; + + usb2: usb2@60f8800 { + status = "ok"; + }; + + cryptobam: dma@8e04000 { + status = "ok"; + }; + + crypto@8e3a000 { + status = "ok"; + }; + + watchdog@b017000 { + status = "ok"; + }; + + qpic_bam: dma@7984000 { + status = "ok"; + }; + + nand: qpic-nand@79b0000 { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi new file mode 100644 index 0000000000..169505973f --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi @@ -0,0 +1,1142 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include <dt-bindings/msm/msm-bus-ids.h> + +/ { + +soc { + ad_hoc_bus: ad-hoc-bus { + compatible = "qcom,msm-bus-device"; + reg = <0x580000 0x14000>, + <0x500000 0x11000>; + reg-names = "snoc-base", "pcnoc-base"; + + /*Buses*/ + + fab_pcnoc: fab-pcnoc { + cell-id = <MSM_BUS_FAB_PERIPH_NOC>; + label = "fab-pcnoc"; + qcom,fab-dev; + qcom,base-name = "pcnoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <0x1000>; + qcom,base-offset = <0x0>; + clocks = <>; + }; + + fab_snoc: fab-snoc { + cell-id = <MSM_BUS_FAB_SYS_NOC>; + label = "fab-snoc"; + qcom,fab-dev; + qcom,base-name = "snoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <0x80>; + qcom,base-offset = <0x0>; + clocks = <>; + }; + + /*Masters*/ + + mas_blsp_bam: mas-blsp-bam { + cell-id = <MSM_BUS_MASTER_BLSP_BAM>; + label = "mas-blsp-bam"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_BLSP_BAM>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_usb2_bam: mas-usb2-bam { + cell-id = <MSM_BUS_MASTER_USB2_BAM>; + label = "mas-usb2-bam"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <15>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_USB2_BAM>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma0: mas-adss-dma0 { + cell-id = <MSM_BUS_MASTER_ADDS_DMA0>; + label = "mas-adss-dma0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_ADSS_DMA0>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma1: mas-adss-dma1 { + cell-id = <MSM_BUS_MASTER_ADDS_DMA1>; + label = "mas-adss-dma1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_ADSS_DMA1>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma2: mas-adss-dma2 { + cell-id = <MSM_BUS_MASTER_ADDS_DMA2>; + label = "mas-adss-dma2"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_ADSS_DMA2>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma3: mas-adss-dma3 { + cell-id = <MSM_BUS_MASTER_ADDS_DMA3>; + label = "mas-adss-dma3"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_ADSS_DMA3>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_qpic_bam: mas-qpic-bam { + cell-id = <MSM_BUS_MASTER_QPIC_BAM>; + label = "mas-qpic-bam"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QPIC_BAM>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_spdm: mas-spdm { + cell-id = <MSM_BUS_MASTER_SPDM>; + label = "mas-spdm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SPDM>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_pcnoc_cfg: mas-pcnoc-cfg { + cell-id = <MSM_BUS_MASTER_PNOC_CFG>; + label = "mas-pcnoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_srvc_pcnoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_CFG>; + }; + + mas_tic: mas-tic { + cell-id = <MSM_BUS_MASTER_TIC>; + label = "mas-tic"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_TIC>; + }; + + mas_sdcc_bam: mas-sdcc-bam { + cell-id = <MSM_BUS_MASTER_SDCC_BAM>; + label = "mas-sdcc-bam"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <14>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SDCC_BAM>; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_snoc_pcnoc: mas-snoc-pcnoc { + cell-id = <MSM_BUS_SNOC_PNOC_MAS>; + label = "mas-snoc-pcnoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <16>; + qcom,qos-mode = "fixed"; + qcom,connections = <&pcnoc_int_0>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_PCNOC>; + }; + + mas_qdss_dap: mas-qdss-dap { + cell-id = <MSM_BUS_MASTER_QDSS_DAP>; + label = "mas-qdss-dap"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_DAP>; + }; + + mas_ddrc_snoc: mas-ddrc-snoc { + cell-id = <MSM_BUS_MASTER_DDRC_SNOC>; + label = "mas-ddrc-snoc"; + qcom,buswidth = <16>; + qcom,ap-owned; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_pcie>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_DDRC_SNOC>; + qcom,blacklist = <&slv_snoc_ddrc_m1 &slv_srvc_snoc>; + }; + + mas_wss_0: mas-wss-0 { + cell-id = <MSM_BUS_MASTER_WSS_0>; + label = "mas-wss-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <26>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_WSS_0>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_wss_1: mas-wss-1 { + cell-id = <MSM_BUS_MASTER_WSS_1>; + label = "mas-wss-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <27>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_WSS_1>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_crypto: mas-crypto { + cell-id = <MSM_BUS_MASTER_CRYPTO>; + label = "mas-crypto"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <5>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_CRYPTO>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_ess: mas-ess { + cell-id = <MSM_BUS_MASTER_ESS>; + label = "mas-ess"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <44>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_ESS>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_pcie: mas-pcie { + cell-id = <MSM_BUS_MASTER_PCIE>; + label = "mas-pcie"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <6>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCIE>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_qdss_stm &slv_wss1_cfg &slv_wss0_cfg + &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_usb3: mas-usb3 { + cell-id = <MSM_BUS_MASTER_USB3>; + label = "mas-usb3"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <7>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_USB3>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_qdss_etr: mas-qdss-etr { + cell-id = <MSM_BUS_MASTER_QDSS_ETR>; + label = "mas-qdss-etr"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <544>; + qcom,qos-mode = "fixed"; + qcom,connections = <&qdss_int>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_ETR>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_qdss_bamndp: mas-qdss-bamndp { + cell-id = <MSM_BUS_MASTER_QDSS_BAMNDP>; + label = "mas-qdss-bamndp"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <576>; + qcom,qos-mode = "fixed"; + qcom,connections = <&qdss_int>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_BAMNDP>; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_pcnoc_snoc: mas-pcnoc-snoc { + cell-id = <MSM_BUS_PNOC_SNOC_MAS>; + label = "mas-pcnoc-snoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <384>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PNOC_SNOC>; + qcom,blacklist = <&slv_srvc_snoc>; + }; + + mas_snoc_cfg: mas-snoc-cfg { + cell-id = <MSM_BUS_MASTER_QDSS_SNOC_CFG>; + label = "mas-snoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_srvc_snoc>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_SNOC_CFG>; + }; + + /*Internal nodes*/ + + + pcnoc_m_0: pcnoc-m-0 { + cell-id = <MSM_BUS_PNOC_M_0>; + label = "pcnoc-m-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <12>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_M_0>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_M_0>; + }; + + pcnoc_m_1: pcnoc-m-1 { + cell-id = <MSM_BUS_PNOC_M_1>; + label = "pcnoc-m-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <13>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_M_1>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_M_1>; + }; + + pcnoc_int_0: pcnoc-int-0 { + cell-id = <MSM_BUS_PNOC_INT_0>; + label = "pcnoc-int-0"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &pcnoc_s_1 &pcnoc_s_2 &pcnoc_s_0 + &pcnoc_s_4 &pcnoc_s_5 + &pcnoc_s_6 &pcnoc_s_7 + &pcnoc_s_8 &pcnoc_s_9 + &pcnoc_s_3>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_INT_0>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_INT_0>; + }; + + pcnoc_s_0: pcnoc-s-0 { + cell-id = <MSM_BUS_PNOC_SLV_0>; + label = "pcnoc-s-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_clk_ctl &slv_tcsr &slv_security + &slv_tlmm>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_0>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_0>; + }; + + pcnoc_s_1: pcnoc-s-1 { + cell-id = <MSM_BUS_PNOC_SLV_1>; + label = "pcnoc-s-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_prng_apu_cfg &slv_prng&slv_imem_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_1>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_1>; + }; + + pcnoc_s_2: pcnoc-s-2 { + cell-id = <MSM_BUS_PNOC_SLV_2>; + label = "pcnoc-s-2"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_spdm &slv_pcnoc_mpu_cfg &slv_pcnoc_cfg + &slv_boot_rom>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_2>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_2>; + }; + + pcnoc_s_3: pcnoc-s-3 { + cell-id = <MSM_BUS_PNOC_SLV_3>; + label = "pcnoc-s-3"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_qdss_cfg&slv_gcnt &slv_snoc_cfg + &slv_snoc_mpu_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_3>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_3>; + }; + + pcnoc_s_4: pcnoc-s-4 { + cell-id = <MSM_BUS_PNOC_SLV_4>; + label = "pcnoc-s-4"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_adss_cfg &slv_adss_vmidmt_cfg &slv_adss_apu>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_4>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_4>; + }; + + pcnoc_s_5: pcnoc-s-5 { + cell-id = <MSM_BUS_PNOC_SLV_5>; + label = "pcnoc-s-5"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_qhss_apu_cfg &slv_fephy_cfg &slv_mdio + &slv_srif>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_5>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_5>; + }; + + pcnoc_s_6: pcnoc-s-6 { + cell-id = <MSM_BUS_PNOC_SLV_6>; + label = "pcnoc-s-6"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_ddrc_mpu0_cfg &slv_ddrc_apu_cfg &slv_ddrc_mpu2_cfg + &slv_ddrc_cfg &slv_ddrc_mpu1_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_6>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_6>; + }; + + pcnoc_s_7: pcnoc-s-7 { + cell-id = <MSM_BUS_PNOC_SLV_7>; + label = "pcnoc-s-7"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_ess_apu_cfg &slv_usb2_cfg&slv_ess_vmidmt_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_7>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_7>; + }; + + pcnoc_s_8: pcnoc-s-8 { + cell-id = <MSM_BUS_PNOC_SLV_8>; + label = "pcnoc-s-8"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_sdcc_cfg &slv_qpic_cfg&slv_blsp_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_8>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_8>; + }; + + pcnoc_s_9: pcnoc-s-9 { + cell-id = <MSM_BUS_PNOC_SLV_9>; + label = "pcnoc-s-9"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_wss1_apu_cfg &slv_wss1_vmidmt_cfg&slv_wss0_vmidmt_cfg + &slv_wss0_apu_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_9>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_9>; + }; + + snoc_int_0: snoc-int-0 { + cell-id = <MSM_BUS_SNOC_INT_0>; + label = "snoc-int-0"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &slv_ocimem&slv_qdss_stm>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_INT_0>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_INT_0>; + }; + + snoc_int_1: snoc-int-1 { + cell-id = <MSM_BUS_SNOC_INT_1>; + label = "snoc-int-1"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &slv_crypto_cfg &slv_a7ss &slv_ess_cfg + &slv_usb3_cfg &slv_wss1_cfg + &slv_wss0_cfg>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_INT_1>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_INT_1>; + }; + + qdss_int: qdss-int { + cell-id = <MSM_BUS_SNOC_QDSS_INT>; + label = "qdss-int"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_INT>; + qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_INT>; + }; + /*Slaves*/ + + slv_clk_ctl:slv-clk-ctl { + cell-id = <MSM_BUS_SLAVE_CLK_CTL>; + label = "slv-clk-ctl"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CLK_CTL>; + }; + + slv_security:slv-security { + cell-id = <MSM_BUS_SLAVE_SECURITY>; + label = "slv-security"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SECURITY>; + }; + + slv_tcsr:slv-tcsr { + cell-id = <MSM_BUS_SLAVE_TCSR>; + label = "slv-tcsr"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TCSR>; + }; + + slv_tlmm:slv-tlmm { + cell-id = <MSM_BUS_SLAVE_TLMM>; + label = "slv-tlmm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TLMM>; + }; + + slv_imem_cfg:slv-imem-cfg { + cell-id = <MSM_BUS_SLAVE_IMEM_CFG>; + label = "slv-imem-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_IMEM_CFG>; + }; + + slv_prng:slv-prng { + cell-id = <MSM_BUS_SLAVE_PRNG>; + label = "slv-prng"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PRNG>; + }; + + slv_prng_apu_cfg:slv-prng-apu-cfg { + cell-id = <MSM_BUS_SLAVE_PRNG_APU_CFG>; + label = "slv-prng-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PRNG_APU_CFG>; + }; + + slv_boot_rom:slv-boot-rom { + cell-id = <MSM_BUS_SLAVE_BOOT_ROM>; + label = "slv-boot-rom"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BOOT_ROM>; + }; + + slv_spdm:slv-spdm { + cell-id = <MSM_BUS_SLAVE_SPDM_WRAPPER>; + label = "slv-spdm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SPDM_WRAPPER>; + }; + + slv_pcnoc_cfg:slv-pcnoc-cfg { + cell-id = <MSM_BUS_SLAVE_PNOC_CFG>; + label = "slv-pcnoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PNOC_CFG>; + }; + + slv_pcnoc_mpu_cfg:slv-pcnoc-mpu-cfg { + cell-id = <MSM_BUS_SLAVE_PERIPH_MPU_CFG>; + label = "slv-pcnoc-mpu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PERIPH_MPU_CFG>; + }; + + slv_gcnt:slv-gcnt { + cell-id = <MSM_BUS_SLAVE_GCNT>; + label = "slv-gcnt"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_GCNT>; + }; + + slv_qdss_cfg:slv-qdss-cfg { + cell-id = <MSM_BUS_SLAVE_QDSS_CFG>; + label = "slv-qdss-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_CFG>; + }; + + slv_snoc_cfg:slv-snoc-cfg { + cell-id = <MSM_BUS_SLAVE_SNOC_CFG>; + label = "slv-snoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CFG>; + }; + + slv_snoc_mpu_cfg:slv-snoc-mpu-cfg { + cell-id = <MSM_BUS_SLAVE_SNOC_MPU_CFG>; + label = "slv-snoc-mpu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_MPU_CFG>; + }; + + slv_adss_cfg:slv-adss-cfg { + cell-id = <MSM_BUS_SLAVE_ADSS_CFG>; + label = "slv-adss-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ADSS_CFG>; + }; + + slv_adss_apu:slv-adss-apu { + cell-id = <MSM_BUS_SLAVE_ADSS_VMIDMT_CFG>; + label = "slv-adss-apu"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ADSS_APU>; + }; + + slv_adss_vmidmt_cfg:slv-adss-vmidmt-cfg { + cell-id = <MSM_BUS_SLAVE_ADSS_VMIDMT_CFG>; + label = "slv-adss-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ADSS_VMIDMT_CFG>; + }; + + slv_qhss_apu_cfg:slv-qhss-apu-cfg { + cell-id = <MSM_BUS_SLAVE_QHSS_APU_CFG>; + label = "slv-qhss-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QHSS_APU_CFG>; + }; + + slv_mdio:slv-mdio { + cell-id = <MSM_BUS_SLAVE_MDIO>; + label = "slv-mdio"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_MDIO>; + }; + + slv_fephy_cfg:slv-fephy-cfg { + cell-id = <MSM_BUS_SLAVE_FEPHY_CFG>; + label = "slv-fephy-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_FEPHY_CFG>; + }; + + slv_srif:slv-srif { + cell-id = <MSM_BUS_SLAVE_SRIF>; + label = "slv-srif"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SRIF>; + }; + + slv_ddrc_cfg:slv-ddrc-cfg { + cell-id = <MSM_BUS_SLAVE_DDRC_CFG>; + label = "slv-ddrc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_DDRC_CFG>; + }; + + slv_ddrc_apu_cfg:slv-ddrc-apu-cfg { + cell-id = <MSM_BUS_SLAVE_DDRC_APU_CFG>; + label = "slv-ddrc-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_DDRC_APU_CFG>; + }; + + slv_ddrc_mpu0_cfg:slv-ddrc-mpu0-cfg { + cell-id = <MSM_BUS_SLAVE_MPU0_CFG>; + label = "slv-ddrc-mpu0-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_DDRC_MPU0_CFG>; + }; + + slv_ddrc_mpu1_cfg:slv-ddrc-mpu1-cfg { + cell-id = <MSM_BUS_SLAVE_MPU1_CFG>; + label = "slv-ddrc-mpu1-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_DDRC_MPU1_CFG>; + }; + + slv_ddrc_mpu2_cfg:slv-ddrc-mpu2-cfg { + cell-id = <MSM_BUS_SLAVE_MPU2_CFG>; + label = "slv-ddrc-mpu2-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_DDRC_MPU2_CFG>; + }; + + slv_ess_vmidmt_cfg:slv-ess-vmidmt-cfg { + cell-id = <MSM_BUS_SLAVE_ESS_VMIDMT_CFG>; + label = "slv-ess-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ESS_VMIDMT_CFG>; + }; + + slv_ess_apu_cfg:slv-ess-apu-cfg { + cell-id = <MSM_BUS_SLAVE_ESS_APU_CFG>; + label = "slv-ess-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ESS_APU_CFG>; + }; + + slv_usb2_cfg:slv-usb2-cfg { + cell-id = <MSM_BUS_SLAVE_USB2_CFG>; + label = "slv-usb2-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_USB2_CFG>; + }; + + slv_blsp_cfg:slv-blsp-cfg { + cell-id = <MSM_BUS_SLAVE_BLSP_CFG>; + label = "slv-blsp-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_CFG>; + }; + + slv_qpic_cfg:slv-qpic-cfg { + cell-id = <MSM_BUS_SLAVE_QPIC_CFG>; + label = "slv-qpic-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QPIC_CFG>; + }; + + slv_sdcc_cfg:slv-sdcc-cfg { + cell-id = <MSM_BUS_SLAVE_SDCC_CFG>; + label = "slv-sdcc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_CFG>; + }; + + slv_wss0_vmidmt_cfg:slv-wss0-vmidmt-cfg { + cell-id = <MSM_BUS_SLAVE_WSS0_VMIDMT_CFG>; + label = "slv-wss0-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS0_VMIDMT_CFG>; + }; + + slv_wss0_apu_cfg:slv-wss0-apu-cfg { + cell-id = <MSM_BUS_SLAVE_WSS0_APU_CFG>; + label = "slv-wss0-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS0_APU_CFG>; + }; + + slv_wss1_vmidmt_cfg:slv-wss1-vmidmt-cfg { + cell-id = <MSM_BUS_SLAVE_WSS1_VMIDMT_CFG>; + label = "slv-wss1-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS1_VMIDMT_CFG>; + }; + + slv_wss1_apu_cfg:slv-wss1-apu-cfg { + cell-id = <MSM_BUS_SLAVE_WSS1_APU_CFG>; + label = "slv-wss1-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS1_APU_CFG>; + }; + + slv_pcnoc_snoc:slv-pcnoc-snoc { + cell-id = <MSM_BUS_PNOC_SNOC_SLV>; + label = "slv-pcnoc-snoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_SNOC>; + }; + + slv_srvc_pcnoc:slv-srvc-pcnoc { + cell-id = <MSM_BUS_SLAVE_SRVC_PCNOC>; + label = "slv-srvc-pcnoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SRVC_PCNOC>; + }; + + slv_snoc_ddrc_m1:slv-snoc-ddrc-m1 { + cell-id = <MSM_BUS_SLAVE_SNOC_DDRC>; + label = "slv-snoc-ddrc-m1"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_DDRC>; + }; + + slv_a7ss:slv-a7ss { + cell-id = <MSM_BUS_SLAVE_A7SS>; + label = "slv-a7ss"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_A7SS>; + }; + + slv_ocimem:slv-ocimem { + cell-id = <MSM_BUS_SLAVE_OCIMEM>; + label = "slv-ocimem"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_OCIMEM>; + }; + + slv_wss0_cfg:slv-wss0-cfg { + cell-id = <MSM_BUS_SLAVE_WSS0_CFG>; + label = "slv-wss0-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS0_CFG>; + }; + + slv_wss1_cfg:slv-wss1-cfg { + cell-id = <MSM_BUS_SLAVE_WSS1_CFG>; + label = "slv-wss1-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WSS1_CFG>; + }; + + slv_pcie:slv-pcie { + cell-id = <MSM_BUS_SLAVE_PCIE>; + label = "slv-pcie"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCIE>; + }; + + slv_usb3_cfg:slv-usb3-cfg { + cell-id = <MSM_BUS_SLAVE_USB3_CFG>; + label = "slv-usb3-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_USB3_CFG>; + }; + + slv_crypto_cfg:slv-crypto-cfg { + cell-id = <MSM_BUS_SLAVE_CRYPTO_CFG>; + label = "slv-crypto-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CRYPTO_CFG>; + }; + + slv_ess_cfg:slv-ess-cfg { + cell-id = <MSM_BUS_SLAVE_ESS_CFG>; + label = "slv-ess-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_ESS_CFG>; + }; + + slv_qdss_stm:slv-qdss-stm { + cell-id = <MSM_BUS_SLAVE_QDSS_STM>; + label = "slv-qdss-stm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_STM>; + }; + + slv_srvc_snoc:slv-srvc-snoc { + cell-id = <MSM_BUS_SLAVE_SRVC_SNOC>; + label = "slv-srvc-snoc"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SRVC_SNOC>; + }; + }; +}; + +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts new file mode 100644 index 0000000000..f5ca3d5c56 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts @@ -0,0 +1,322 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include "qcom-ipq4019-bus.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/soc/qcom,tcsr.h> + +/ { + model = "AVM FRITZ!Box 4040"; + compatible = "avm,fritzbox-4040", "qcom,ipq4019"; + + aliases { + led-boot = &power; + led-failsafe = &flash; + led-running = &power; + led-upgrade = &flash; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + tz_apps@87b80000 { + reg = <0x87b80000 0x280000>; + reusable; + }; + + smem@87e00000 { + reg = <0x87e00000 0x080000>; + no-map; + }; + + tz@87e80000 { + reg = <0x87e80000 0x180000>; + no-map; + }; + }; + + soc { + mdio@90000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = <TCSR_ESS_PSGMII>; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; + }; + + usb2@60f8800 { + status = "ok"; + }; + + serial@78af000 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + usb3@8af8800 { + status = "ok"; + }; + + crypto@8e3a000 { + status = "ok"; + }; + + wifi@a000000 { + status = "okay"; + }; + + wifi@a800000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "ok"; + }; + + qca8075: ess-switch@c000000 { + status = "okay"; + + #gpio-cells = <2>; + gpio-controller; + + enable-usb-power { + gpio-hog; + line-name = "enable USB3 power"; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + }; + }; + + edma@c080000 { + status = "okay"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + wlan { + label = "wlan"; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RFKILL>; + }; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + wlan { + label = "fritz4040:green:wlan"; + gpios = <&qca8075 1 GPIO_ACTIVE_HIGH>; + }; + + panic: info_red { + label = "fritz4040:red:info"; + gpios = <&qca8075 3 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + wan { + label = "fritz4040:green:wan"; + gpios = <&qca8075 5 GPIO_ACTIVE_HIGH>; + }; + + power: power { + label = "fritz4040:green:power"; + gpios = <&qca8075 11 GPIO_ACTIVE_HIGH>; + }; + + lan { + label = "fritz4040:green:lan"; + gpios = <&qca8075 13 GPIO_ACTIVE_HIGH>; + }; + + flash: info_amber { + label = "fritz4040:amber:info"; + gpios = <&qca8075 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&cryptobam { + status = "ok"; +}; + +&blsp_dma { + status = "ok"; +}; + +&spi_0 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + cs-gpios = <&tlmm 54 0>; + + mx25l25635f@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + spi-max-frequency = <24000000>; + status = "ok"; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "APPSBLENV"; /* uboot env - empty */ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "urlader"; /* APPSBL */ + reg = <0x000f0000 0x0002dc000>; + read-only; + }; + partition7@11dc00 { + /* make a backup of this partition! */ + label = "urlader_config"; + reg = <0x0011dc00 0x00002400>; + read-only; + }; + partition8@120000 { + label = "tffs1"; + reg = <0x00120000 0x00080000>; + read-only; + }; + partition9@1a0000 { + label = "tffs2"; + reg = <0x001a0000 0x00080000>; + read-only; + }; + partition10@220000 { + label = "uboot"; + reg = <0x00220000 0x00080000>; + read-only; + }; + partition11@2A0000 { + label = "firmware"; + reg = <0x002a0000 0x01c60000>; + }; + partition12@1f00000 { + label = "jffs2"; + reg = <0x01f00000 0x00100000>; + }; + }; + }; +}; + +&usb3_ss_phy { + status = "ok"; +}; + +&usb3_hs_phy { + status = "ok"; +}; + +&usb2_hs_phy { + status = "ok"; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-gl-b1300.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-gl-b1300.dts new file mode 100644 index 0000000000..53824e3c8d --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-gl-b1300.dts @@ -0,0 +1,316 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/soc/qcom,tcsr.h> + +/ { + model = "GL.iNet GL-B1300"; + compatible = "glinet,gl-b1300", "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + apps_bl@87000000 { + reg = <0x87000000 0x400000>; + no-map; + }; + + sbl@87400000 { + reg = <0x87400000 0x100000>; + no-map; + }; + + cnss_debug@87500000 { + reg = <0x87500000 0x600000>; + no-map; + }; + + cpu_context_dump@87b00000 { + reg = <0x87b00000 0x080000>; + no-map; + }; + + tz_apps@87b80000 { + reg = <0x87b80000 0x280000>; + no-map; + }; + + smem@87e00000 { + reg = <0x87e00000 0x080000>; + no-map; + }; + + tz@87e80000 { + reg = <0x87e80000 0x180000>; + no-map; + }; + }; + + soc { + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>; + status = "ok"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = <TCSR_ESS_PSGMII>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; + }; + + pinctrl@1000000 { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; + }; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + blsp_dma: dma@7884000 { + status = "ok"; + }; + + spi_0: spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + cs-gpios = <&tlmm 54 0>; + }; + + serial@78af000 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + cryptobam: dma@8e04000 { + status = "ok"; + }; + + crypto@8e3a000 { + status = "ok"; + }; + + watchdog@b017000 { + status = "ok"; + }; + + usb3_ss_phy: ssphy@9a000 { + status = "ok"; + }; + + usb3_hs_phy: hsphy@a6000 { + status = "ok"; + }; + + usb3: usb3@8af8800 { + status = "ok"; + }; + + usb2_hs_phy: hsphy@a8000 { + status = "ok"; + }; + + usb2: usb2@60f8800 { + status = "ok"; + }; + + mdio@90000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + + wifi@a000000 { + status = "okay"; + }; + + wifi@a800000 { + status = "okay"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power { + label = "gl-b1300:green:power"; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + mesh { + label = "gl-b1300:green:mesh"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + wlan { + label = "gl-b1300:green:wlan"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi_0 { + mx25l25635f@0 { + compatible = "mx25l25635f", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + SBL1@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + MIBIB@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + QSEE@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + CDT@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + DDRPARAMS@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + APPSBLENV@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + APPSBL@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + ART@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + kernel@180000 { + label = "kernel"; + reg = <0x180000 0x400000>; + }; + rootfs@580000 { + label = "rootfs"; + reg = <0x580000 0x1a80000>; + }; + firmware@180000 { + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; +}; + +&gmac0 { + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <2 0x20>; +}; + +&gmac1 { + qcom,phy_mdio_addr = <3>; + qcom,poll_required = <1>; + qcom,forced_speed = <1000>; + qcom,forced_duplex = <1>; + vlan_tag = <1 0x10>; +};
\ No newline at end of file |