diff options
Diffstat (limited to 'target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch')
| -rw-r--r-- | target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch | 266 |
1 files changed, 266 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch b/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch new file mode 100644 index 0000000000..4bb691d36b --- /dev/null +++ b/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch @@ -0,0 +1,266 @@ +From 16df7dc5901c1cb2a40f6adbd0d9423768ed8210 Mon Sep 17 00:00:00 2001 +From: Tim Harvey <tharvey@gateworks.com> +Date: Thu, 15 May 2014 00:29:18 -0700 +Subject: [PATCH] net: igb: add phy read/write functions that accept phy addr + +Add igb_write_reg_gs40g/igb_read_reg_gs40g that can be passed a phy address. +The existing igb_write_phy_reg_gs40g/igb_read_phy_reg_gs40g become wrappers +to this function. + +Signed-off-by: Tim Harvey <tharvey@gateworks.com> +--- + drivers/net/ethernet/intel/igb/e1000_82575.c | 4 +- + drivers/net/ethernet/intel/igb/e1000_phy.c | 74 +++++++++++++++++++--------- + drivers/net/ethernet/intel/igb/e1000_phy.h | 6 ++- + 3 files changed, 58 insertions(+), 26 deletions(-) + +Index: linux-4.3/drivers/net/ethernet/intel/igb/e1000_82575.c +=================================================================== +--- linux-4.3.orig/drivers/net/ethernet/intel/igb/e1000_82575.c 2015-11-01 16:05:25.000000000 -0800 ++++ linux-4.3/drivers/net/ethernet/intel/igb/e1000_82575.c 2015-12-18 10:43:28.000000000 -0800 +@@ -2153,7 +2153,7 @@ + if (ret_val) + goto out; + +- ret_val = igb_read_phy_reg_mdic(hw, offset, data); ++ ret_val = igb_read_phy_reg_mdic(hw, hw->phy.addr, offset, data); + + hw->phy.ops.release(hw); + +@@ -2178,7 +2178,7 @@ + if (ret_val) + goto out; + +- ret_val = igb_write_phy_reg_mdic(hw, offset, data); ++ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, offset, data); + + hw->phy.ops.release(hw); + +Index: linux-4.3/drivers/net/ethernet/intel/igb/e1000_phy.c +=================================================================== +--- linux-4.3.orig/drivers/net/ethernet/intel/igb/e1000_phy.c 2015-12-18 10:39:44.931158318 -0800 ++++ linux-4.3/drivers/net/ethernet/intel/igb/e1000_phy.c 2015-12-18 10:39:44.939158318 -0800 +@@ -126,9 +126,8 @@ + * Reads the MDI control regsiter in the PHY at offset and stores the + * information read to data. + **/ +-s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) ++s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data) + { +- struct e1000_phy_info *phy = &hw->phy; + u32 i, mdicnfg, mdic = 0; + s32 ret_val = 0; + +@@ -147,14 +146,14 @@ + case e1000_i211: + mdicnfg = rd32(E1000_MDICNFG); + mdicnfg &= ~(E1000_MDICNFG_PHY_MASK); +- mdicnfg |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); ++ mdicnfg |= (addr << E1000_MDICNFG_PHY_SHIFT); + wr32(E1000_MDICNFG, mdicnfg); + mdic = ((offset << E1000_MDIC_REG_SHIFT) | + (E1000_MDIC_OP_READ)); + break; + default: + mdic = ((offset << E1000_MDIC_REG_SHIFT) | +- (phy->addr << E1000_MDIC_PHY_SHIFT) | ++ (addr << E1000_MDIC_PHY_SHIFT) | + (E1000_MDIC_OP_READ)); + break; + } +@@ -208,9 +207,8 @@ + * + * Writes data to MDI control register in the PHY at offset. + **/ +-s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) ++s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 data) + { +- struct e1000_phy_info *phy = &hw->phy; + u32 i, mdicnfg, mdic = 0; + s32 ret_val = 0; + +@@ -229,7 +227,7 @@ + case e1000_i211: + mdicnfg = rd32(E1000_MDICNFG); + mdicnfg &= ~(E1000_MDICNFG_PHY_MASK); +- mdicnfg |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); ++ mdicnfg |= (addr << E1000_MDICNFG_PHY_SHIFT); + wr32(E1000_MDICNFG, mdicnfg); + mdic = (((u32)data) | + (offset << E1000_MDIC_REG_SHIFT) | +@@ -238,7 +236,7 @@ + default: + mdic = (((u32)data) | + (offset << E1000_MDIC_REG_SHIFT) | +- (phy->addr << E1000_MDIC_PHY_SHIFT) | ++ (addr << E1000_MDIC_PHY_SHIFT) | + (E1000_MDIC_OP_WRITE)); + break; + } +@@ -458,7 +456,7 @@ + goto out; + + if (offset > MAX_PHY_MULTI_PAGE_REG) { +- ret_val = igb_write_phy_reg_mdic(hw, ++ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, + IGP01E1000_PHY_PAGE_SELECT, + (u16)offset); + if (ret_val) { +@@ -467,8 +465,8 @@ + } + } + +- ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, +- data); ++ ret_val = igb_read_phy_reg_mdic(hw, hw->phy.addr, ++ MAX_PHY_REG_ADDRESS & offset, data); + + hw->phy.ops.release(hw); + +@@ -497,7 +495,7 @@ + goto out; + + if (offset > MAX_PHY_MULTI_PAGE_REG) { +- ret_val = igb_write_phy_reg_mdic(hw, ++ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, + IGP01E1000_PHY_PAGE_SELECT, + (u16)offset); + if (ret_val) { +@@ -506,8 +504,8 @@ + } + } + +- ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, +- data); ++ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, ++ MAX_PHY_REG_ADDRESS & offset, data); + + hw->phy.ops.release(hw); + +@@ -2547,8 +2545,9 @@ + } + + /** +- * igb_write_phy_reg_gs40g - Write GS40G PHY register ++ * igb_write_reg_gs40g - Write GS40G PHY register + * @hw: pointer to the HW structure ++ * @addr: phy address to write to + * @offset: lower half is register offset to write to + * upper half is page to use. + * @data: data to write at register offset +@@ -2556,7 +2555,7 @@ + * Acquires semaphore, if necessary, then writes the data to PHY register + * at the offset. Release any acquired semaphores before exiting. + **/ +-s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data) ++s32 igb_write_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 data) + { + s32 ret_val; + u16 page = offset >> GS40G_PAGE_SHIFT; +@@ -2566,10 +2565,10 @@ + if (ret_val) + return ret_val; + +- ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page); ++ ret_val = igb_write_phy_reg_mdic(hw, addr, GS40G_PAGE_SELECT, page); + if (ret_val) + goto release; +- ret_val = igb_write_phy_reg_mdic(hw, offset, data); ++ ret_val = igb_write_phy_reg_mdic(hw, addr, offset, data); + + release: + hw->phy.ops.release(hw); +@@ -2577,8 +2576,24 @@ + } + + /** +- * igb_read_phy_reg_gs40g - Read GS40G PHY register ++ * igb_write_phy_reg_gs40g - Write GS40G PHY register ++ * @hw: pointer to the HW structure ++ * @offset: lower half is register offset to write to ++ * upper half is page to use. ++ * @data: data to write at register offset ++ * ++ * Acquires semaphore, if necessary, then writes the data to PHY register ++ * at the offset. Release any acquired semaphores before exiting. ++ **/ ++s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data) ++{ ++ return igb_write_reg_gs40g(hw, hw->phy.addr, offset, data); ++} ++ ++/** ++ * igb_read_reg_gs40g - Read GS40G PHY register + * @hw: pointer to the HW structure ++ * @addr: phy address to read from + * @offset: lower half is register offset to read to + * upper half is page to use. + * @data: data to read at register offset +@@ -2586,7 +2601,7 @@ + * Acquires semaphore, if necessary, then reads the data in the PHY register + * at the offset. Release any acquired semaphores before exiting. + **/ +-s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data) ++s32 igb_read_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data) + { + s32 ret_val; + u16 page = offset >> GS40G_PAGE_SHIFT; +@@ -2596,10 +2611,10 @@ + if (ret_val) + return ret_val; + +- ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page); ++ ret_val = igb_write_phy_reg_mdic(hw, addr, GS40G_PAGE_SELECT, page); + if (ret_val) + goto release; +- ret_val = igb_read_phy_reg_mdic(hw, offset, data); ++ ret_val = igb_read_phy_reg_mdic(hw, addr, offset, data); + + release: + hw->phy.ops.release(hw); +@@ -2607,6 +2622,21 @@ + } + + /** ++ * igb_read_phy_reg_gs40g - Read GS40G PHY register ++ * @hw: pointer to the HW structure ++ * @offset: lower half is register offset to read to ++ * upper half is page to use. ++ * @data: data to read at register offset ++ * ++ * Acquires semaphore, if necessary, then reads the data in the PHY register ++ * at the offset. Release any acquired semaphores before exiting. ++ **/ ++s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data) ++{ ++ return igb_read_reg_gs40g(hw, hw->phy.addr, offset, data); ++} ++ ++/** + * igb_set_master_slave_mode - Setup PHY for Master/slave mode + * @hw: pointer to the HW structure + * +Index: linux-4.3/drivers/net/ethernet/intel/igb/e1000_phy.h +=================================================================== +--- linux-4.3.orig/drivers/net/ethernet/intel/igb/e1000_phy.h 2015-11-01 16:05:25.000000000 -0800 ++++ linux-4.3/drivers/net/ethernet/intel/igb/e1000_phy.h 2015-12-18 10:39:44.939158318 -0800 +@@ -62,8 +62,8 @@ + void igb_power_down_phy_copper(struct e1000_hw *hw); + s32 igb_phy_init_script_igp3(struct e1000_hw *hw); + s32 igb_initialize_M88E1512_phy(struct e1000_hw *hw); +-s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); +-s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); ++s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data); ++s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 data); + s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data); + s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data); + s32 igb_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data); +@@ -73,6 +73,8 @@ + s32 igb_get_cable_length_82580(struct e1000_hw *hw); + s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data); + s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data); ++s32 igb_read_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data); ++s32 igb_write_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 data); + s32 igb_check_polarity_m88(struct e1000_hw *hw); + + /* IGP01E1000 Specific Registers */ |