diff options
Diffstat (limited to 'target/linux/imx6/files-3.10')
15 files changed, 0 insertions, 2803 deletions
diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts deleted file mode 100644 index 113f1c6389..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6dl.dtsi" -#include "imx6qdl-gw51xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX"; - compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6DL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6DL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6DL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6DL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */ - MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - >; - }; - }; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw52xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw52xx.dts deleted file mode 100644 index 816a2425a5..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw52xx.dts +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6dl.dtsi" -#include "imx6qdl-gw52xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX"; - compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6DL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6DL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6DL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6DL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */ - MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6DL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ - MX6DL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */ - MX6DL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ - MX6DL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6DL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */ - MX6DL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6DL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */ - MX6DL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */ - MX6DL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */ - >; - }; - }; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw53xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw53xx.dts deleted file mode 100644 index 967925701b..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw53xx.dts +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6dl.dtsi" -#include "imx6qdl-gw53xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX"; - compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6DL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6DL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6DL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6DL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */ - MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6DL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ - MX6DL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */ - MX6DL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ - MX6DL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6DL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6DL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */ - MX6DL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */ - MX6DL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */ - >; - }; - }; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw54xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw54xx.dts deleted file mode 100644 index 76c760bac5..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw54xx.dts +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6dl.dtsi" -#include "imx6qdl-gw54xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX"; - compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6DL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6DL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ - MX6DL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ - MX6DL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ - MX6DL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6DL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ - MX6DL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6DL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ - MX6DL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ - >; - }; - }; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw51xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw51xx.dts deleted file mode 100644 index 84b08f927b..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw51xx.dts +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-gw51xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX"; - compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6Q_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6Q_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6Q_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6Q_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */ - MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6Q_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - >; - }; - }; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw52xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw52xx.dts deleted file mode 100644 index 6e0558e316..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw52xx.dts +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-gw52xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX"; - compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6Q_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6Q_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6Q_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */ - MX6Q_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ - MX6Q_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */ - MX6Q_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ - MX6Q_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6Q_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */ - MX6Q_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6Q_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6Q_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */ - MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */ - MX6Q_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */ - >; - }; - }; -}; - -&sata { - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw53xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw53xx.dts deleted file mode 100644 index 4f9319a4e2..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw53xx.dts +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-gw53xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX"; - compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6Q_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ - MX6Q_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6Q_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */ - MX6Q_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ - MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ - MX6Q_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */ - MX6Q_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ - MX6Q_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6Q_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6Q_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6Q_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */ - MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */ - MX6Q_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */ - >; - }; - }; -}; - -&sata { - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw5400-a.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw5400-a.dts deleted file mode 100644 index 9677135840..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw5400-a.dts +++ /dev/null @@ -1,438 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" - -/ { - model = "Gateworks Ventana GW5400-A"; - compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q"; - - /* these are used by bootloader for disabling nodes */ - aliases { - ethernet0 = &fec; - ethernet1 = ð1; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - led0 = &led0; - led1 = &led1; - led2 = &led2; - sky2 = ð1; - ssi0 = &ssi1; - spi0 = &ecspi1; - usb0 = &usbh1; - usb1 = &usbotg; - usdhc2 = &usdhc3; - }; - - chosen { - bootargs = "console=ttymxc1,115200"; - }; - - leds { - compatible = "gpio-leds"; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */ - default-state = "off"; - }; - - led2: user3 { - label = "user3"; - gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ - default-state = "off"; - }; - }; - - memory { - reg = <0x10000000 0x40000000>; - }; - - regulators { - compatible = "simple-bus"; - - reg_1p0v: 1p0v { - compatible = "regulator-fixed"; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_h1_vbus: usb_h1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: usb_otg_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - }; - - sound { - compatible = "fsl,imx6q-sabrelite-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "imx6q-sabrelite-sgtl5000"; - ssi-controller = <&ssi1>; - audio-codec = <&codec>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <4>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_1>; - status = "okay"; -}; - -&ecspi1 { - fsl,spi-num-chipselects = <1>; - cs-gpios = <&gpio3 19 0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1_1>; - status = "okay"; - - flash: m25p80@0 { - compatible = "sst,w25q256"; - spi-max-frequency = <30000000>; - reg = <0>; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 30 0>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - hwmon: gsc@29 { - compatible = "gw,gsp"; - reg = <0x29>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_2>; - status = "okay"; - - pmic: pfuze100@08 { - compatible = "fsl,pfuze100"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1ab { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw1c_reg: sw1c { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3950000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3b_reg: sw3b { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: sw4 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2_reg: vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vgen4_reg: vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vgen5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; - - pciswitch: pex8609@3f { - compatible = "plx,pex8609"; - reg = <0x3f>; - }; - - pciclkgen: si52147@6b { - compatible = "sil,si52147"; - reg = <0x6b>; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_2>; - status = "okay"; - - accelerometer: mma8450@1c { - compatible = "fsl,mma8450"; - reg = <0x1c>; - }; - - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clks 169>; - VDDA-supply = <&sw4_reg>; - VDDIO-supply = <®_3p3v>; - }; - - hdmiin: adv7611@4c { - compatible = "adi,adv7611"; - reg = <0x4c>; - }; - - touchscreen: egalax_ts@04 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio7>; - interrupts = <12 2>; /* gpio7_12 active low */ - wakeup-gpios = <&gpio7 12 0>; - }; - - videoout: adv7393@2a { - compatible = "adi,adv7393"; - reg = <0x2a>; - }; - - videoin: adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ - MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ - MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ - MX6Q_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6Q_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6Q_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */ - MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ - MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ - >; - }; - }; -}; - -&ldb { - status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; - }; -}; - -&pcie { - reset-gpio = <&gpio1 29 0>; - status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - /* Filled in by U-Boot */ - mac-address = [ 00 00 00 00 00 00 ]; - }; -}; - -&ssi1 { - fsl,mode = "i2s-slave"; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_2>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_1>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_2>; - cd-gpios = <&gpio7 0 0>; - vmmc-supply = <®_3p3v>; - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw54xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw54xx.dts deleted file mode 100644 index abbf1aae41..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw54xx.dts +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-gw54xx.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX"; - compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - hog { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ - MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ - MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ - MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ - MX6Q_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ - MX6Q_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ - MX6Q_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ - MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ - MX6Q_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ - MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ - MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ - MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ - >; - }; - }; -}; - -&ldb { - status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; - }; -}; - -&sata { - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi deleted file mode 100644 index 146a337b89..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ /dev/null @@ -1,245 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - can0 = &can1; - ethernet0 = &fec; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - led0 = &led0; - led1 = &led1; - nand = &gpmi; - usb0 = &usbh1; - usb1 = &usbotg; - }; - - leds { - compatible = "gpio-leds"; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ - default-state = "off"; - }; - }; - - memory { - reg = <0x10000000 0x20000000>; - }; - - regulators { - compatible = "simple-bus"; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_5p0v: 5p0v { - compatible = "regulator-fixed"; - regulator-name = "5P0V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: usb_otg_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 30 0>; - status = "okay"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand_2>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - hwmon: gsc@29 { - compatible = "gw,gsp"; - reg = <0x29>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_2>; - status = "okay"; - - pmic: ltc3676@3c { - compatible = "ltc,ltc3676"; - reg = <0x3c>; - - regulators { - sw1_reg: ltc3676__sw1 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: ltc3676__sw2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3_reg: ltc3676__sw3 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: ltc3676__sw4 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo2_reg: ltc3676__ldo2 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4_reg: ltc3676__ldo4 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_2>; - status = "okay"; - - videoin: adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - }; -}; - -&pcie { - reset-gpio = <&gpio1 0 0>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_2>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_3>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3_3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_1>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi deleted file mode 100644 index 186ed9d204..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +++ /dev/null @@ -1,344 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - can0 = &can1; - ethernet0 = &fec; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - led0 = &led0; - led1 = &led1; - led2 = &led2; - nand = &gpmi; - ssi0 = &ssi1; - usb0 = &usbh1; - usb1 = &usbotg; - usdhc2 = &usdhc3; - }; - - leds { - compatible = "gpio-leds"; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ - default-state = "off"; - }; - - led2: user3 { - label = "user3"; - gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */ - default-state = "off"; - }; - }; - - memory { - reg = <0x10000000 0x20000000>; - }; - - regulators { - compatible = "simple-bus"; - - reg_1p0v: 1p0v { - compatible = "regulator-fixed"; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - /* remove this fixed regulator once ltc3676__sw2 driver available */ - reg_1p8v: 1p8v { - compatible = "regulator-fixed"; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_5p0v: 5p0v { - compatible = "regulator-fixed"; - regulator-name = "5P0V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: usb_otg_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - }; - - sound { - compatible = "fsl,imx6q-ventana-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "sgtl5000-audio"; - ssi-controller = <&ssi1>; - audio-codec = <&codec>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <4>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_1>; - status = "okay"; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1_1>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 30 0>; - status = "okay"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand_2>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - hwmon: gsc@29 { - compatible = "gw,gsp"; - reg = <0x29>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_2>; - status = "okay"; - - pciswitch: pex8609@3f { - compatible = "plx,pex8609"; - reg = <0x3f>; - }; - - pmic: ltc3676@3c { - compatible = "ltc,ltc3676"; - reg = <0x3c>; - - regulators { - sw1_reg: ltc3676__sw1 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: ltc3676__sw2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3_reg: ltc3676__sw3 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: ltc3676__sw4 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo2_reg: ltc3676__ldo2 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo3_reg: ltc3676__ldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4_reg: ltc3676__ldo4 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_2>; - status = "okay"; - - accelerometer: fxos8700@1e { - compatible = "fsl,fxos8700"; - reg = <0x13>; - }; - - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clks 169>; - VDDA-supply = <®_1p8v>; - VDDIO-supply = <®_3p3v>; - }; - - touchscreen: egalax_ts@04 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio7>; - interrupts = <12 2>; /* gpio7_12 active low */ - wakeup-gpios = <&gpio7 12 0>; - }; - - videoin: adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - }; -}; - -&ldb { - status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>; - }; -}; - -&pcie { - reset-gpio = <&gpio1 29 0>; - status = "okay"; -}; - -&ssi1 { - fsl,mode = "i2s-slave"; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_2>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_1>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_2>; - cd-gpios = <&gpio7 0 0>; - vmmc-supply = <®_3p3v>; - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi deleted file mode 100644 index e7ae350ffd..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - can0 = &can1; - ethernet0 = &fec; - ethernet1 = ð1; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - led0 = &led0; - led1 = &led1; - led2 = &led2; - nand = &gpmi; - sky2 = ð1; - ssi0 = &ssi1; - usb0 = &usbh1; - usb1 = &usbotg; - usdhc2 = &usdhc3; - }; - - chosen { - bootargs = "console=ttymxc1,115200"; - }; - - leds { - compatible = "gpio-leds"; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ - default-state = "off"; - }; - - led2: user3 { - label = "user3"; - gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ - default-state = "off"; - }; - }; - - memory { - reg = <0x10000000 0x40000000>; - }; - - regulators { - compatible = "simple-bus"; - - reg_1p0v: 1p0v { - compatible = "regulator-fixed"; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - /* remove this fixed regulator once ltc3676__sw2 driver available */ - reg_1p8v: 1p8v { - compatible = "regulator-fixed"; - regulator-name = "1P8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_h1_vbus: usb_h1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: usb_otg_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - }; - - sound { - compatible = "fsl,imx6q-ventana-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "sgtl5000-audio"; - ssi-controller = <&ssi1>; - audio-codec = <&codec>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <4>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_1>; - status = "okay"; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1_1>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 30 0>; - status = "okay"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand_2>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - hwmon: gsc@29 { - compatible = "gw,gsp"; - reg = <0x29>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_2>; - status = "okay"; - - pciswitch: pex8609@3f { - compatible = "plx,pex8609"; - reg = <0x3f>; - }; - - pmic: ltc3676@3c { - compatible = "ltc,ltc3676"; - reg = <0x3c>; - - regulators { - sw1_reg: ltc3676__sw1 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: ltc3676__sw2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3_reg: ltc3676__sw3 { - regulator-min-microvolt = <1175000>; - regulator-max-microvolt = <1175000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: ltc3676__sw4 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo2_reg: ltc3676__ldo2 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo3_reg: ltc3676__ldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4_reg: ltc3676__ldo4 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_2>; - status = "okay"; - - accelerometer: fxos8700@1e { - compatible = "fsl,fxos8700"; - reg = <0x1e>; - }; - - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clks 169>; - VDDA-supply = <®_1p8v>; - VDDIO-supply = <®_3p3v>; - }; - - hdmiin: adv7611@4c { - compatible = "adi,adv7611"; - reg = <0x4c>; - }; - - touchscreen: egalax_ts@04 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio7>; - interrupts = <12 2>; /* gpio7_12 active low */ - wakeup-gpios = <&gpio7 12 0>; - }; - - videoout: adv7393@2a { - compatible = "adi,adv7393"; - reg = <0x2a>; - }; - - videoin: adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - }; -}; - -&ldb { - status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>; - }; -}; - -&pcie { - reset-gpio = <&gpio1 29 0>; - status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - /* Filled in by U-Boot */ - mac-address = [ 00 00 00 00 00 00 ]; - }; -}; - -&ssi1 { - fsl,mode = "i2s-slave"; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_2>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_1>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_2>; - cd-gpios = <&gpio7 0 0>; - vmmc-supply = <®_3p3v>; - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi deleted file mode 100644 index 6f66caa789..0000000000 --- a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ /dev/null @@ -1,408 +0,0 @@ -/* - * Copyright 2013 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - can0 = &can1; - ethernet0 = &fec; - ethernet1 = ð1; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - led0 = &led0; - led1 = &led1; - led2 = &led2; - nand = &gpmi; - sky2 = ð1; - ssi0 = &ssi1; - usb0 = &usbh1; - usb1 = &usbotg; - usdhc2 = &usdhc3; - }; - - chosen { - bootargs = "console=ttymxc1,115200"; - }; - - leds { - compatible = "gpio-leds"; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ - default-state = "off"; - }; - - led2: user3 { - label = "user3"; - gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ - default-state = "off"; - }; - }; - - memory { - reg = <0x10000000 0x40000000>; - }; - - regulators { - compatible = "simple-bus"; - - reg_1p0v: 1p0v { - compatible = "regulator-fixed"; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_h1_vbus: usb_h1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: usb_otg_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; - enable-active-high; - }; - }; - - sound { - compatible = "fsl,imx6q-ventana-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "sgtl5000-audio"; - ssi-controller = <&ssi1>; - audio-codec = <&codec>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <4>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_1>; - status = "okay"; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1_1>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 30 0>; - status = "okay"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand_2>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - hwmon: gsc@29 { - compatible = "gw,gsp"; - reg = <0x29>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_2>; - status = "okay"; - - pmic: pfuze100@08 { - compatible = "fsl,pfuze100"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1ab { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw1c_reg: sw1c { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3950000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3b_reg: sw3b { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: sw4 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2_reg: vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vgen4_reg: vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vgen5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; - - pciswitch: pex8609@3f { - compatible = "plx,pex8609"; - reg = <0x3f>; - }; - - pciclkgen: si52147@6b { - compatible = "sil,si52147"; - reg = <0x6b>; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_2>; - status = "okay"; - - accelerometer: fxos8700@1e { - compatible = "fsl,fxos8700"; - reg = <0x1e>; - }; - - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clks 169>; - VDDA-supply = <&sw4_reg>; - VDDIO-supply = <®_3p3v>; - }; - - hdmiin: adv7611@4c { - compatible = "adi,adv7611"; - reg = <0x4c>; - }; - - touchscreen: egalax_ts@04 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio7>; - interrupts = <12 2>; /* gpio7_12 active low */ - wakeup-gpios = <&gpio7 12 0>; - }; - - videoout: adv7393@2a { - compatible = "adi,adv7393"; - reg = <0x2a>; - }; - - videoin: adv7180@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - }; -}; - -&ldb { - status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>; - }; -}; - -&pcie { - reset-gpio = <&gpio1 29 0>; - status = "okay"; - - eth1: sky2@8 { /* MAC/PHY on bus 8 */ - compatible = "marvell,sky2"; - /* Filled in by U-Boot */ - mac-address = [ 00 00 00 00 00 00 ]; - }; -}; - -&ssi1 { - fsl,mode = "i2s-slave"; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_2>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_1>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_2>; - cd-gpios = <&gpio7 0 0>; - vmmc-supply = <®_3p3v>; - status = "okay"; -}; diff --git a/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.c b/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.c deleted file mode 100644 index c10e9ac9bb..0000000000 --- a/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.c +++ /dev/null @@ -1,565 +0,0 @@ -/* - * Synopsys Designware PCIe host controller driver - * - * Copyright (C) 2013 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Author: Jingoo Han <jg1.han@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/of_address.h> -#include <linux/pci.h> -#include <linux/pci_regs.h> -#include <linux/types.h> - -#include "pcie-designware.h" - -/* Synopsis specific PCIE configuration registers */ -#define PCIE_PORT_LINK_CONTROL 0x710 -#define PORT_LINK_MODE_MASK (0x3f << 16) -#define PORT_LINK_MODE_1_LANES (0x1 << 16) -#define PORT_LINK_MODE_2_LANES (0x3 << 16) -#define PORT_LINK_MODE_4_LANES (0x7 << 16) - -#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C -#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17) -#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8) -#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8) -#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8) -#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8) - -#define PCIE_MSI_ADDR_LO 0x820 -#define PCIE_MSI_ADDR_HI 0x824 -#define PCIE_MSI_INTR0_ENABLE 0x828 -#define PCIE_MSI_INTR0_MASK 0x82C -#define PCIE_MSI_INTR0_STATUS 0x830 - -#define PCIE_ATU_VIEWPORT 0x900 -#define PCIE_ATU_REGION_INBOUND (0x1 << 31) -#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31) -#define PCIE_ATU_REGION_INDEX1 (0x1 << 0) -#define PCIE_ATU_REGION_INDEX0 (0x0 << 0) -#define PCIE_ATU_CR1 0x904 -#define PCIE_ATU_TYPE_MEM (0x0 << 0) -#define PCIE_ATU_TYPE_IO (0x2 << 0) -#define PCIE_ATU_TYPE_CFG0 (0x4 << 0) -#define PCIE_ATU_TYPE_CFG1 (0x5 << 0) -#define PCIE_ATU_CR2 0x908 -#define PCIE_ATU_ENABLE (0x1 << 31) -#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30) -#define PCIE_ATU_LOWER_BASE 0x90C -#define PCIE_ATU_UPPER_BASE 0x910 -#define PCIE_ATU_LIMIT 0x914 -#define PCIE_ATU_LOWER_TARGET 0x918 -#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24) -#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19) -#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16) -#define PCIE_ATU_UPPER_TARGET 0x91C - -static struct hw_pci dw_pci; - -unsigned long global_io_offset; - -static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys) -{ - return sys->private_data; -} - -int cfg_read(void __iomem *addr, int where, int size, u32 *val) -{ - *val = readl(addr); - - if (size == 1) - *val = (*val >> (8 * (where & 3))) & 0xff; - else if (size == 2) - *val = (*val >> (8 * (where & 3))) & 0xffff; - else if (size != 4) - return PCIBIOS_BAD_REGISTER_NUMBER; - - return PCIBIOS_SUCCESSFUL; -} - -int cfg_write(void __iomem *addr, int where, int size, u32 val) -{ - if (size == 4) - writel(val, addr); - else if (size == 2) - writew(val, addr + (where & 2)); - else if (size == 1) - writeb(val, addr + (where & 3)); - else - return PCIBIOS_BAD_REGISTER_NUMBER; - - return PCIBIOS_SUCCESSFUL; -} - -static inline void dw_pcie_readl_rc(struct pcie_port *pp, u32 reg, u32 *val) -{ - if (pp->ops->readl_rc) - pp->ops->readl_rc(pp, pp->dbi_base + reg, val); - else - *val = readl(pp->dbi_base + reg); -} - -static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 val, u32 reg) -{ - if (pp->ops->writel_rc) - pp->ops->writel_rc(pp, val, pp->dbi_base + reg); - else - writel(val, pp->dbi_base + reg); -} - -int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, - u32 *val) -{ - int ret; - - if (pp->ops->rd_own_conf) - ret = pp->ops->rd_own_conf(pp, where, size, val); - else - ret = cfg_read(pp->dbi_base + (where & ~0x3), where, size, val); - - return ret; -} - -int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, - u32 val) -{ - int ret; - - if (pp->ops->wr_own_conf) - ret = pp->ops->wr_own_conf(pp, where, size, val); - else - ret = cfg_write(pp->dbi_base + (where & ~0x3), where, size, - val); - - return ret; -} - -int dw_pcie_link_up(struct pcie_port *pp) -{ - if (pp->ops->link_up) - return pp->ops->link_up(pp); - else - return 0; -} - -int __init dw_pcie_host_init(struct pcie_port *pp) -{ - struct device_node *np = pp->dev->of_node; - struct of_pci_range range; - struct of_pci_range_parser parser; - u32 val; - - if (of_pci_range_parser_init(&parser, np)) { - dev_err(pp->dev, "missing ranges property\n"); - return -EINVAL; - } - - /* Get the I/O and memory ranges from DT */ - for_each_of_pci_range(&parser, &range) { - unsigned long restype = range.flags & IORESOURCE_TYPE_BITS; - if (restype == IORESOURCE_IO) { - of_pci_range_to_resource(&range, np, &pp->io); - pp->io.name = "I/O"; - pp->io.start = max_t(resource_size_t, - PCIBIOS_MIN_IO, - range.pci_addr + global_io_offset); - pp->io.end = min_t(resource_size_t, - IO_SPACE_LIMIT, - range.pci_addr + range.size - + global_io_offset); - pp->config.io_size = resource_size(&pp->io); - pp->config.io_bus_addr = range.pci_addr; - } - if (restype == IORESOURCE_MEM) { - of_pci_range_to_resource(&range, np, &pp->mem); - pp->mem.name = "MEM"; - pp->config.mem_size = resource_size(&pp->mem); - pp->config.mem_bus_addr = range.pci_addr; - } - if (restype == 0) { - of_pci_range_to_resource(&range, np, &pp->cfg); - pp->config.cfg0_size = resource_size(&pp->cfg)/2; - pp->config.cfg1_size = resource_size(&pp->cfg)/2; - } - } - - if (!pp->dbi_base) { - pp->dbi_base = devm_ioremap(pp->dev, pp->cfg.start, - resource_size(&pp->cfg)); - if (!pp->dbi_base) { - dev_err(pp->dev, "error with ioremap\n"); - return -ENOMEM; - } - } - - pp->cfg0_base = pp->cfg.start; - pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size; - pp->io_base = pp->io.start; - pp->mem_base = pp->mem.start; - - pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base, - pp->config.cfg0_size); - if (!pp->va_cfg0_base) { - dev_err(pp->dev, "error with ioremap in function\n"); - return -ENOMEM; - } - pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base, - pp->config.cfg1_size); - if (!pp->va_cfg1_base) { - dev_err(pp->dev, "error with ioremap\n"); - return -ENOMEM; - } - - if (of_property_read_u32(np, "num-lanes", &pp->lanes)) { - dev_err(pp->dev, "Failed to parse the number of lanes\n"); - return -EINVAL; - } - - if (pp->ops->host_init) - pp->ops->host_init(pp); - - dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); - - /* program correct class for RC */ - dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI); - - dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val); - val |= PORT_LOGIC_SPEED_CHANGE; - dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); - - dw_pci.nr_controllers = 1; - dw_pci.private_data = (void **)&pp; - - pci_common_init(&dw_pci); - pci_assign_unassigned_resources(); -#ifdef CONFIG_PCI_DOMAINS - dw_pci.domain++; -#endif - - return 0; -} - -static void dw_pcie_prog_viewport_cfg0(struct pcie_port *pp, u32 busdev) -{ - /* Program viewport 0 : OUTBOUND : CFG0 */ - dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, - PCIE_ATU_VIEWPORT); - dw_pcie_writel_rc(pp, pp->cfg0_base, PCIE_ATU_LOWER_BASE); - dw_pcie_writel_rc(pp, (pp->cfg0_base >> 32), PCIE_ATU_UPPER_BASE); - dw_pcie_writel_rc(pp, pp->cfg0_base + pp->config.cfg0_size - 1, - PCIE_ATU_LIMIT); - dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); - dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); - dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG0, PCIE_ATU_CR1); - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); -} - -static void dw_pcie_prog_viewport_cfg1(struct pcie_port *pp, u32 busdev) -{ - /* Program viewport 1 : OUTBOUND : CFG1 */ - dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, - PCIE_ATU_VIEWPORT); - dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1); - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); - dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE); - dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE); - dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1, - PCIE_ATU_LIMIT); - dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); - dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); -} - -static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp) -{ - /* Program viewport 0 : OUTBOUND : MEM */ - dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, - PCIE_ATU_VIEWPORT); - dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1); - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); - dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE); - dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE); - dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1, - PCIE_ATU_LIMIT); - dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET); - dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr), - PCIE_ATU_UPPER_TARGET); -} - -static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp) -{ - /* Program viewport 1 : OUTBOUND : IO */ - dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, - PCIE_ATU_VIEWPORT); - dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1); - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); - dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE); - dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE); - dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1, - PCIE_ATU_LIMIT); - dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET); - dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr), - PCIE_ATU_UPPER_TARGET); -} - -static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, - u32 devfn, int where, int size, u32 *val) -{ - int ret = PCIBIOS_SUCCESSFUL; - u32 address, busdev; - - busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | - PCIE_ATU_FUNC(PCI_FUNC(devfn)); - address = where & ~0x3; - - if (bus->parent->number == pp->root_bus_nr) { - dw_pcie_prog_viewport_cfg0(pp, busdev); - ret = cfg_read(pp->va_cfg0_base + address, where, size, val); - dw_pcie_prog_viewport_mem_outbound(pp); - } else { - dw_pcie_prog_viewport_cfg1(pp, busdev); - ret = cfg_read(pp->va_cfg1_base + address, where, size, val); - dw_pcie_prog_viewport_io_outbound(pp); - } - - return ret; -} - -static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, - u32 devfn, int where, int size, u32 val) -{ - int ret = PCIBIOS_SUCCESSFUL; - u32 address, busdev; - - busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | - PCIE_ATU_FUNC(PCI_FUNC(devfn)); - address = where & ~0x3; - - if (bus->parent->number == pp->root_bus_nr) { - dw_pcie_prog_viewport_cfg0(pp, busdev); - ret = cfg_write(pp->va_cfg0_base + address, where, size, val); - dw_pcie_prog_viewport_mem_outbound(pp); - } else { - dw_pcie_prog_viewport_cfg1(pp, busdev); - ret = cfg_write(pp->va_cfg1_base + address, where, size, val); - dw_pcie_prog_viewport_io_outbound(pp); - } - - return ret; -} - - -static int dw_pcie_valid_config(struct pcie_port *pp, - struct pci_bus *bus, int dev) -{ - /* If there is no link, then there is no device */ - if (bus->number != pp->root_bus_nr) { - if (!dw_pcie_link_up(pp)) - return 0; - } - - /* access only one slot on each root port */ - if (bus->number == pp->root_bus_nr && dev > 0) - return 0; - - /* - * do not read more than one device on the bus directly attached - * to RC's (Virtual Bridge's) DS side. - */ - if (bus->primary == pp->root_bus_nr && dev > 0) - return 0; - - return 1; -} - -static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, - int size, u32 *val) -{ - struct pcie_port *pp = sys_to_pcie(bus->sysdata); - unsigned long flags; - int ret; - - if (!pp) { - BUG(); - return -EINVAL; - } - - if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) { - *val = 0xffffffff; - return PCIBIOS_DEVICE_NOT_FOUND; - } - - spin_lock_irqsave(&pp->conf_lock, flags); - if (bus->number != pp->root_bus_nr) - ret = dw_pcie_rd_other_conf(pp, bus, devfn, - where, size, val); - else - ret = dw_pcie_rd_own_conf(pp, where, size, val); - spin_unlock_irqrestore(&pp->conf_lock, flags); - - return ret; -} - -static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, - int where, int size, u32 val) -{ - struct pcie_port *pp = sys_to_pcie(bus->sysdata); - unsigned long flags; - int ret; - - if (!pp) { - BUG(); - return -EINVAL; - } - - if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) - return PCIBIOS_DEVICE_NOT_FOUND; - - spin_lock_irqsave(&pp->conf_lock, flags); - if (bus->number != pp->root_bus_nr) - ret = dw_pcie_wr_other_conf(pp, bus, devfn, - where, size, val); - else - ret = dw_pcie_wr_own_conf(pp, where, size, val); - spin_unlock_irqrestore(&pp->conf_lock, flags); - - return ret; -} - -static struct pci_ops dw_pcie_ops = { - .read = dw_pcie_rd_conf, - .write = dw_pcie_wr_conf, -}; - -int dw_pcie_setup(int nr, struct pci_sys_data *sys) -{ - struct pcie_port *pp; - - pp = sys_to_pcie(sys); - - if (!pp) - return 0; - - if (global_io_offset < SZ_1M && pp->config.io_size > 0) { - sys->io_offset = global_io_offset - pp->config.io_bus_addr; - pci_ioremap_io(sys->io_offset, pp->io.start); - global_io_offset += SZ_64K; - pci_add_resource_offset(&sys->resources, &pp->io, - sys->io_offset); - } - - sys->mem_offset = pp->mem.start - pp->config.mem_bus_addr; - pci_add_resource_offset(&sys->resources, &pp->mem, sys->mem_offset); - - return 1; -} - -struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys) -{ - struct pci_bus *bus; - struct pcie_port *pp = sys_to_pcie(sys); - - if (pp) { - pp->root_bus_nr = sys->busnr; - bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops, - sys, &sys->resources); - } else { - bus = NULL; - BUG(); - } - - return bus; -} - -int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); - - return pp->irq; -} - -static struct hw_pci dw_pci = { - .setup = dw_pcie_setup, - .scan = dw_pcie_scan_bus, - .map_irq = dw_pcie_map_irq, -}; - -void dw_pcie_setup_rc(struct pcie_port *pp) -{ - struct pcie_port_info *config = &pp->config; - u32 val; - u32 membase; - u32 memlimit; - - /* set the number of lines as 4 */ - dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val); - val &= ~PORT_LINK_MODE_MASK; - switch (pp->lanes) { - case 1: - val |= PORT_LINK_MODE_1_LANES; - break; - case 2: - val |= PORT_LINK_MODE_2_LANES; - break; - case 4: - val |= PORT_LINK_MODE_4_LANES; - break; - } - dw_pcie_writel_rc(pp, val, PCIE_PORT_LINK_CONTROL); - - /* set link width speed control register */ - dw_pcie_readl_rc(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, &val); - val &= ~PORT_LOGIC_LINK_WIDTH_MASK; - switch (pp->lanes) { - case 1: - val |= PORT_LOGIC_LINK_WIDTH_1_LANES; - break; - case 2: - val |= PORT_LOGIC_LINK_WIDTH_2_LANES; - break; - case 4: - val |= PORT_LOGIC_LINK_WIDTH_4_LANES; - break; - } - dw_pcie_writel_rc(pp, val, PCIE_LINK_WIDTH_SPEED_CONTROL); - - /* setup RC BARs */ - dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_0); - dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_1); - - /* setup interrupt pins */ - dw_pcie_readl_rc(pp, PCI_INTERRUPT_LINE, &val); - val &= 0xffff00ff; - val |= 0x00000100; - dw_pcie_writel_rc(pp, val, PCI_INTERRUPT_LINE); - - /* setup bus numbers */ - dw_pcie_readl_rc(pp, PCI_PRIMARY_BUS, &val); - val &= 0xff000000; - val |= 0x00010100; - dw_pcie_writel_rc(pp, val, PCI_PRIMARY_BUS); - - /* setup memory base, memory limit */ - membase = ((u32)pp->mem_base & 0xfff00000) >> 16; - memlimit = (config->mem_size + (u32)pp->mem_base) & 0xfff00000; - val = memlimit | membase; - dw_pcie_writel_rc(pp, val, PCI_MEMORY_BASE); - - /* setup command register */ - dw_pcie_readl_rc(pp, PCI_COMMAND, &val); - val &= 0xffff0000; - val |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER | PCI_COMMAND_SERR; - dw_pcie_writel_rc(pp, val, PCI_COMMAND); -} - -MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>"); -MODULE_DESCRIPTION("Designware PCIe host controller driver"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.h b/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.h deleted file mode 100644 index 133820f1da..0000000000 --- a/target/linux/imx6/files-3.10/drivers/pci/host/pcie-designware.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Synopsys Designware PCIe host controller driver - * - * Copyright (C) 2013 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Author: Jingoo Han <jg1.han@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -struct pcie_port_info { - u32 cfg0_size; - u32 cfg1_size; - u32 io_size; - u32 mem_size; - phys_addr_t io_bus_addr; - phys_addr_t mem_bus_addr; -}; - -struct pcie_port { - struct device *dev; - u8 root_bus_nr; - void __iomem *dbi_base; - u64 cfg0_base; - void __iomem *va_cfg0_base; - u64 cfg1_base; - void __iomem *va_cfg1_base; - u64 io_base; - u64 mem_base; - spinlock_t conf_lock; - struct resource cfg; - struct resource io; - struct resource mem; - struct pcie_port_info config; - int irq; - u32 lanes; - struct pcie_host_ops *ops; -}; - -struct pcie_host_ops { - void (*readl_rc)(struct pcie_port *pp, - void __iomem *dbi_base, u32 *val); - void (*writel_rc)(struct pcie_port *pp, - u32 val, void __iomem *dbi_base); - int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); - int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val); - int (*link_up)(struct pcie_port *pp); - void (*host_init)(struct pcie_port *pp); -}; - -extern unsigned long global_io_offset; - -int cfg_read(void __iomem *addr, int where, int size, u32 *val); -int cfg_write(void __iomem *addr, int where, int size, u32 val); -int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, u32 val); -int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, u32 *val); -int dw_pcie_link_up(struct pcie_port *pp); -void dw_pcie_setup_rc(struct pcie_port *pp); -int dw_pcie_host_init(struct pcie_port *pp); -int dw_pcie_setup(int nr, struct pci_sys_data *sys); -struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys); -int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); |