diff options
Diffstat (limited to 'target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch')
| -rw-r--r-- | target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch new file mode 100644 index 0000000000..4d24b40535 --- /dev/null +++ b/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch @@ -0,0 +1,69 @@ +From c8756cbad816954be912ba32277ccd55fe7acc01 Mon Sep 17 00:00:00 2001 +From: Tim Harvey <tharvey@gateworks.com> +Date: Tue, 12 May 2020 13:59:56 -0700 +Subject: [PATCH 06/20] ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn + support + +Add one node for the accel/gyro i2c device and another for the separate +magnetometer device in the lsm9ds1. + +Signed-off-by: Tim Harvey <tharvey@gateworks.com> +Signed-off-by: Shawn Guo <shawnguo@kernel.org> +--- + arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi +@@ -248,6 +248,15 @@ + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + ++ magn@1c { ++ compatible = "st,lsm9ds1-magn"; ++ reg = <0x1c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_mag>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <17 IRQ_TYPE_EDGE_RISING>; ++ }; ++ + ltc3676: pmic@3c { + compatible = "lltc,ltc3676"; + reg = <0x3c>; +@@ -320,6 +329,16 @@ + }; + }; + }; ++ ++ imu@6a { ++ compatible = "st,lsm9ds1-imu"; ++ reg = <0x6a>; ++ st,drdy-int-pin = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_imu>; ++ interrupt-parent = <&gpio4>; ++ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; ++ }; + }; + + &i2c3 { +@@ -501,6 +520,18 @@ + >; + }; + ++ pinctrl_imu: imugrp { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_mag: maggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 ++ >; ++ }; ++ + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ |