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path: root/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
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Diffstat (limited to 'target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch')
-rw-r--r--target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
index c6d964eaa9..fecd19166c 100644
--- a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
+++ b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
@@ -29,12 +29,12 @@ Signed-off-by: Marek BehĂșn <kabel@kernel.org>
/* PIO registers base address and register offsets */
#define PIO_BASE_ADDR 0x4000
#define PIO_CTRL (PIO_BASE_ADDR + 0x0)
-@@ -967,7 +963,7 @@ static int advk_sw_pci_bridge_init(struc
+@@ -966,7 +962,7 @@ static int advk_sw_pci_bridge_init(struc
bridge->conf.pref_mem_limit = cpu_to_le16(PCI_PREF_RANGE_TYPE_64);
/* Support interrupt A for MSI feature */
- bridge->conf.intpin = PCIE_CORE_INT_A_ASSERT_ENABLE;
+ bridge->conf.intpin = PCI_INTERRUPT_INTA;
- /* Indicates supports for Completion Retry Status */
- bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
+ /* Aardvark HW provides PCIe Capability structure in version 2 */
+ bridge->pcie_conf.cap = cpu_to_le16(2);