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-rw-r--r--target/linux/generic/pending-4.4/736-at803x-fix-reset-handling.patch43
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/generic/pending-4.4/736-at803x-fix-reset-handling.patch b/target/linux/generic/pending-4.4/736-at803x-fix-reset-handling.patch
new file mode 100644
index 0000000000..91c2334e55
--- /dev/null
+++ b/target/linux/generic/pending-4.4/736-at803x-fix-reset-handling.patch
@@ -0,0 +1,43 @@
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 23 Mar 2016 00:44:40 +0300
+Subject: [PATCH] at803x: fix reset handling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The driver of course "knows" that the chip's reset signal is active low,
+so it drives the GPIO to 0 to reset the PHY and to 1 otherwise; however
+all this will only work iff the GPIO is specified as active-high in the
+device tree! I think both the driver and the device trees (if there are
+any -- I was unable to find them) need to be fixed in this case...
+
+Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/phy/at803x.c
++++ b/drivers/net/phy/at803x.c
+@@ -250,7 +250,7 @@ static int at803x_probe(struct phy_devic
+ if (!priv)
+ return -ENOMEM;
+
+- gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
++ gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(gpiod_reset))
+ return PTR_ERR(gpiod_reset);
+
+@@ -377,10 +377,10 @@ static void at803x_link_change_notify(st
+
+ at803x_context_save(phydev, &context);
+
+- gpiod_set_value(priv->gpiod_reset, 0);
+- msleep(1);
+ gpiod_set_value(priv->gpiod_reset, 1);
+ msleep(1);
++ gpiod_set_value(priv->gpiod_reset, 0);
++ msleep(1);
+
+ at803x_context_restore(phydev, &context);
+