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-rw-r--r--target/linux/generic/pending-3.18/027-bcma-from-4.1.patch680
1 files changed, 680 insertions, 0 deletions
diff --git a/target/linux/generic/pending-3.18/027-bcma-from-4.1.patch b/target/linux/generic/pending-3.18/027-bcma-from-4.1.patch
new file mode 100644
index 0000000000..c88a816fef
--- /dev/null
+++ b/target/linux/generic/pending-3.18/027-bcma-from-4.1.patch
@@ -0,0 +1,680 @@
+--- a/drivers/bcma/bcma_private.h
++++ b/drivers/bcma/bcma_private.h
+@@ -24,6 +24,7 @@ bool bcma_wait_value(struct bcma_device
+ int timeout);
+ void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core);
+ void bcma_init_bus(struct bcma_bus *bus);
++void bcma_unregister_cores(struct bcma_bus *bus);
+ int bcma_bus_register(struct bcma_bus *bus);
+ void bcma_bus_unregister(struct bcma_bus *bus);
+ int __init bcma_bus_early_register(struct bcma_bus *bus);
+@@ -40,6 +41,9 @@ int bcma_bus_scan(struct bcma_bus *bus);
+ int bcma_sprom_get(struct bcma_bus *bus);
+
+ /* driver_chipcommon.c */
++void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc);
++void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
++void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
+ #ifdef CONFIG_BCMA_DRIVER_MIPS
+ void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
+ extern struct platform_device bcma_pflash_dev;
+@@ -50,6 +54,8 @@ int bcma_core_chipcommon_b_init(struct b
+ void bcma_core_chipcommon_b_free(struct bcma_drv_cc_b *ccb);
+
+ /* driver_chipcommon_pmu.c */
++void bcma_pmu_early_init(struct bcma_drv_cc *cc);
++void bcma_pmu_init(struct bcma_drv_cc *cc);
+ u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc);
+ u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc);
+
+@@ -98,7 +104,35 @@ static inline void __exit bcma_host_soc_
+ #endif /* CONFIG_BCMA_HOST_SOC && CONFIG_OF */
+
+ /* driver_pci.c */
++#ifdef CONFIG_BCMA_DRIVER_PCI
+ u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address);
++void bcma_core_pci_early_init(struct bcma_drv_pci *pc);
++void bcma_core_pci_init(struct bcma_drv_pci *pc);
++void bcma_core_pci_up(struct bcma_drv_pci *pc);
++void bcma_core_pci_down(struct bcma_drv_pci *pc);
++#else
++static inline void bcma_core_pci_early_init(struct bcma_drv_pci *pc)
++{
++ WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
++}
++static inline void bcma_core_pci_init(struct bcma_drv_pci *pc)
++{
++ /* Initialization is required for PCI hosted bus */
++ WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
++}
++#endif
++
++/* driver_pcie2.c */
++#ifdef CONFIG_BCMA_DRIVER_PCI
++void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
++void bcma_core_pcie2_up(struct bcma_drv_pcie2 *pcie2);
++#else
++static inline void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2)
++{
++ /* Initialization is required for PCI hosted bus */
++ WARN_ON(pcie2->core->bus->hosttype == BCMA_HOSTTYPE_PCI);
++}
++#endif
+
+ extern int bcma_chipco_watchdog_register(struct bcma_drv_cc *cc);
+
+@@ -115,6 +149,39 @@ static inline void bcma_core_pci_hostmod
+ }
+ #endif /* CONFIG_BCMA_DRIVER_PCI_HOSTMODE */
+
++/**************************************************
++ * driver_mips.c
++ **************************************************/
++
++#ifdef CONFIG_BCMA_DRIVER_MIPS
++unsigned int bcma_core_mips_irq(struct bcma_device *dev);
++void bcma_core_mips_early_init(struct bcma_drv_mips *mcore);
++void bcma_core_mips_init(struct bcma_drv_mips *mcore);
++#else
++static inline unsigned int bcma_core_mips_irq(struct bcma_device *dev)
++{
++ return 0;
++}
++static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
++{
++}
++static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore)
++{
++}
++#endif
++
++/**************************************************
++ * driver_gmac_cmn.c
++ **************************************************/
++
++#ifdef CONFIG_BCMA_DRIVER_GMAC_CMN
++void bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc);
++#else
++static inline void bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc)
++{
++}
++#endif
++
+ #ifdef CONFIG_BCMA_DRIVER_GPIO
+ /* driver_gpio.c */
+ int bcma_gpio_init(struct bcma_drv_cc *cc);
+--- a/drivers/bcma/driver_gpio.c
++++ b/drivers/bcma/driver_gpio.c
+@@ -17,6 +17,8 @@
+
+ #include "bcma_private.h"
+
++#define BCMA_GPIO_MAX_PINS 32
++
+ static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip)
+ {
+ return container_of(chip, struct bcma_drv_cc, gpio);
+@@ -76,7 +78,7 @@ static void bcma_gpio_free(struct gpio_c
+ bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
+ }
+
+-#if IS_BUILTIN(CONFIG_BCM47XX)
++#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X)
+ static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
+ {
+ struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
+@@ -204,6 +206,7 @@ static void bcma_gpio_irq_domain_exit(st
+
+ int bcma_gpio_init(struct bcma_drv_cc *cc)
+ {
++ struct bcma_bus *bus = cc->core->bus;
+ struct gpio_chip *chip = &cc->gpio;
+ int err;
+
+@@ -215,14 +218,14 @@ int bcma_gpio_init(struct bcma_drv_cc *c
+ chip->set = bcma_gpio_set_value;
+ chip->direction_input = bcma_gpio_direction_input;
+ chip->direction_output = bcma_gpio_direction_output;
+-#if IS_BUILTIN(CONFIG_BCM47XX)
++#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X)
+ chip->to_irq = bcma_gpio_to_irq;
+ #endif
+ #if IS_BUILTIN(CONFIG_OF)
+ if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
+ chip->of_node = cc->core->dev.of_node;
+ #endif
+- switch (cc->core->bus->chipinfo.id) {
++ switch (bus->chipinfo.id) {
+ case BCMA_CHIP_ID_BCM5357:
+ case BCMA_CHIP_ID_BCM53572:
+ chip->ngpio = 32;
+@@ -231,13 +234,17 @@ int bcma_gpio_init(struct bcma_drv_cc *c
+ chip->ngpio = 16;
+ }
+
+- /* There is just one SoC in one device and its GPIO addresses should be
+- * deterministic to address them more easily. The other buses could get
+- * a random base number. */
+- if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
+- chip->base = 0;
+- else
+- chip->base = -1;
++ /*
++ * On MIPS we register GPIO devices (LEDs, buttons) using absolute GPIO
++ * pin numbers. We don't have Device Tree there and we can't really use
++ * relative (per chip) numbers.
++ * So let's use predictable base for BCM47XX and "random" for all other.
++ */
++#if IS_BUILTIN(CONFIG_BCM47XX)
++ chip->base = bus->num * BCMA_GPIO_MAX_PINS;
++#else
++ chip->base = -1;
++#endif
+
+ err = bcma_gpio_irq_domain_init(cc);
+ if (err)
+--- a/drivers/bcma/driver_pci.c
++++ b/drivers/bcma/driver_pci.c
+@@ -282,39 +282,6 @@ void bcma_core_pci_power_save(struct bcm
+ }
+ EXPORT_SYMBOL_GPL(bcma_core_pci_power_save);
+
+-int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core,
+- bool enable)
+-{
+- struct pci_dev *pdev;
+- u32 coremask, tmp;
+- int err = 0;
+-
+- if (!pc || core->bus->hosttype != BCMA_HOSTTYPE_PCI) {
+- /* This bcma device is not on a PCI host-bus. So the IRQs are
+- * not routed through the PCI core.
+- * So we must not enable routing through the PCI core. */
+- goto out;
+- }
+-
+- pdev = pc->core->bus->host_pci;
+-
+- err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
+- if (err)
+- goto out;
+-
+- coremask = BIT(core->core_index) << 8;
+- if (enable)
+- tmp |= coremask;
+- else
+- tmp &= ~coremask;
+-
+- err = pci_write_config_dword(pdev, BCMA_PCI_IRQMASK, tmp);
+-
+-out:
+- return err;
+-}
+-EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
+-
+ static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
+ {
+ u32 w;
+@@ -328,28 +295,12 @@ static void bcma_core_pci_extend_L1timer
+ bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
+ }
+
+-void bcma_core_pci_up(struct bcma_bus *bus)
++void bcma_core_pci_up(struct bcma_drv_pci *pc)
+ {
+- struct bcma_drv_pci *pc;
+-
+- if (bus->hosttype != BCMA_HOSTTYPE_PCI)
+- return;
+-
+- pc = &bus->drv_pci[0];
+-
+ bcma_core_pci_extend_L1timer(pc, true);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_up);
+
+-void bcma_core_pci_down(struct bcma_bus *bus)
++void bcma_core_pci_down(struct bcma_drv_pci *pc)
+ {
+- struct bcma_drv_pci *pc;
+-
+- if (bus->hosttype != BCMA_HOSTTYPE_PCI)
+- return;
+-
+- pc = &bus->drv_pci[0];
+-
+ bcma_core_pci_extend_L1timer(pc, false);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_down);
+--- a/drivers/bcma/driver_pci_host.c
++++ b/drivers/bcma/driver_pci_host.c
+@@ -11,6 +11,7 @@
+
+ #include "bcma_private.h"
+ #include <linux/pci.h>
++#include <linux/slab.h>
+ #include <linux/export.h>
+ #include <linux/bcma/bcma.h>
+ #include <asm/paccess.h>
+--- a/drivers/bcma/driver_pcie2.c
++++ b/drivers/bcma/driver_pcie2.c
+@@ -10,6 +10,7 @@
+
+ #include "bcma_private.h"
+ #include <linux/bcma/bcma.h>
++#include <linux/pci.h>
+
+ /**************************************************
+ * R/W ops.
+@@ -156,14 +157,23 @@ static void pciedev_reg_pm_clk_period(st
+
+ void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2)
+ {
+- struct bcma_chipinfo *ci = &pcie2->core->bus->chipinfo;
++ struct bcma_bus *bus = pcie2->core->bus;
++ struct bcma_chipinfo *ci = &bus->chipinfo;
+ u32 tmp;
+
+ tmp = pcie2_read32(pcie2, BCMA_CORE_PCIE2_SPROM(54));
+ if ((tmp & 0xe) >> 1 == 2)
+ bcma_core_pcie2_cfg_write(pcie2, 0x4e0, 0x17);
+
+- /* TODO: Do we need pcie_reqsize? */
++ switch (bus->chipinfo.id) {
++ case BCMA_CHIP_ID_BCM4360:
++ case BCMA_CHIP_ID_BCM4352:
++ pcie2->reqsize = 1024;
++ break;
++ default:
++ pcie2->reqsize = 128;
++ break;
++ }
+
+ if (ci->id == BCMA_CHIP_ID_BCM4360 && ci->rev > 3)
+ bcma_core_pcie2_war_delay_perst_enab(pcie2, true);
+@@ -173,3 +183,18 @@ void bcma_core_pcie2_init(struct bcma_dr
+ pciedev_crwlpciegen2_180(pcie2);
+ pciedev_crwlpciegen2_182(pcie2);
+ }
++
++/**************************************************
++ * Runtime ops.
++ **************************************************/
++
++void bcma_core_pcie2_up(struct bcma_drv_pcie2 *pcie2)
++{
++ struct bcma_bus *bus = pcie2->core->bus;
++ struct pci_dev *dev = bus->host_pci;
++ int err;
++
++ err = pcie_set_readrq(dev, pcie2->reqsize);
++ if (err)
++ bcma_err(bus, "Error setting PCI_EXP_DEVCTL_READRQ: %d\n", err);
++}
+--- a/drivers/bcma/host_pci.c
++++ b/drivers/bcma/host_pci.c
+@@ -213,16 +213,26 @@ static int bcma_host_pci_probe(struct pc
+ /* Initialize struct, detect chip */
+ bcma_init_bus(bus);
+
++ /* Scan bus to find out generation of PCIe core */
++ err = bcma_bus_scan(bus);
++ if (err)
++ goto err_pci_unmap_mmio;
++
++ if (bcma_find_core(bus, BCMA_CORE_PCIE2))
++ bus->host_is_pcie2 = true;
++
+ /* Register */
+ err = bcma_bus_register(bus);
+ if (err)
+- goto err_pci_unmap_mmio;
++ goto err_unregister_cores;
+
+ pci_set_drvdata(dev, bus);
+
+ out:
+ return err;
+
++err_unregister_cores:
++ bcma_unregister_cores(bus);
+ err_pci_unmap_mmio:
+ pci_iounmap(dev, bus->mmio);
+ err_pci_release_regions:
+@@ -283,9 +293,12 @@ static const struct pci_device_id bcma_p
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
++ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4360) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) },
++ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a0) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a9) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43aa) },
++ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43b1) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43227) }, /* 0xa8db, BCM43217 (sic!) */
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43228) }, /* 0xa8dc */
+@@ -310,3 +323,65 @@ void __exit bcma_host_pci_exit(void)
+ {
+ pci_unregister_driver(&bcma_pci_bridge_driver);
+ }
++
++/**************************************************
++ * Runtime ops for drivers.
++ **************************************************/
++
++/* See also pcicore_up */
++void bcma_host_pci_up(struct bcma_bus *bus)
++{
++ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++ return;
++
++ if (bus->host_is_pcie2)
++ bcma_core_pcie2_up(&bus->drv_pcie2);
++ else
++ bcma_core_pci_up(&bus->drv_pci[0]);
++}
++EXPORT_SYMBOL_GPL(bcma_host_pci_up);
++
++/* See also pcicore_down */
++void bcma_host_pci_down(struct bcma_bus *bus)
++{
++ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++ return;
++
++ if (!bus->host_is_pcie2)
++ bcma_core_pci_down(&bus->drv_pci[0]);
++}
++EXPORT_SYMBOL_GPL(bcma_host_pci_down);
++
++/* See also si_pci_setup */
++int bcma_host_pci_irq_ctl(struct bcma_bus *bus, struct bcma_device *core,
++ bool enable)
++{
++ struct pci_dev *pdev;
++ u32 coremask, tmp;
++ int err = 0;
++
++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) {
++ /* This bcma device is not on a PCI host-bus. So the IRQs are
++ * not routed through the PCI core.
++ * So we must not enable routing through the PCI core. */
++ goto out;
++ }
++
++ pdev = bus->host_pci;
++
++ err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
++ if (err)
++ goto out;
++
++ coremask = BIT(core->core_index) << 8;
++ if (enable)
++ tmp |= coremask;
++ else
++ tmp &= ~coremask;
++
++ err = pci_write_config_dword(pdev, BCMA_PCI_IRQMASK, tmp);
++
++out:
++ return err;
++}
++EXPORT_SYMBOL_GPL(bcma_host_pci_irq_ctl);
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -363,7 +363,7 @@ static int bcma_register_devices(struct
+ return 0;
+ }
+
+-static void bcma_unregister_cores(struct bcma_bus *bus)
++void bcma_unregister_cores(struct bcma_bus *bus)
+ {
+ struct bcma_device *core, *tmp;
+
+--- a/drivers/net/wireless/b43/main.c
++++ b/drivers/net/wireless/b43/main.c
+@@ -4770,7 +4770,7 @@ static void b43_wireless_core_exit(struc
+ switch (dev->dev->bus_type) {
+ #ifdef CONFIG_B43_BCMA
+ case B43_BUS_BCMA:
+- bcma_core_pci_down(dev->dev->bdev->bus);
++ bcma_host_pci_down(dev->dev->bdev->bus);
+ break;
+ #endif
+ #ifdef CONFIG_B43_SSB
+@@ -4817,9 +4817,9 @@ static int b43_wireless_core_init(struct
+ switch (dev->dev->bus_type) {
+ #ifdef CONFIG_B43_BCMA
+ case B43_BUS_BCMA:
+- bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci[0],
++ bcma_host_pci_irq_ctl(dev->dev->bdev->bus,
+ dev->dev->bdev, true);
+- bcma_core_pci_up(dev->dev->bdev->bus);
++ bcma_host_pci_up(dev->dev->bdev->bus);
+ break;
+ #endif
+ #ifdef CONFIG_B43_SSB
+--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
+@@ -4669,7 +4669,7 @@ static int brcms_b_attach(struct brcms_c
+ brcms_c_coredisable(wlc_hw);
+
+ /* Match driver "down" state */
+- bcma_core_pci_down(wlc_hw->d11core->bus);
++ bcma_host_pci_down(wlc_hw->d11core->bus);
+
+ /* turn off pll and xtal to match driver "down" state */
+ brcms_b_xtal(wlc_hw, OFF);
+@@ -4960,7 +4960,7 @@ static int brcms_b_up_prep(struct brcms_
+ * Configure pci/pcmcia here instead of in brcms_c_attach()
+ * to allow mfg hotswap: down, hotswap (chip power cycle), up.
+ */
+- bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci[0], wlc_hw->d11core,
++ bcma_host_pci_irq_ctl(wlc_hw->d11core->bus, wlc_hw->d11core,
+ true);
+
+ /*
+@@ -4970,12 +4970,12 @@ static int brcms_b_up_prep(struct brcms_
+ */
+ if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
+ /* put SB PCI in down state again */
+- bcma_core_pci_down(wlc_hw->d11core->bus);
++ bcma_host_pci_down(wlc_hw->d11core->bus);
+ brcms_b_xtal(wlc_hw, OFF);
+ return -ENOMEDIUM;
+ }
+
+- bcma_core_pci_up(wlc_hw->d11core->bus);
++ bcma_host_pci_up(wlc_hw->d11core->bus);
+
+ /* reset the d11 core */
+ brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
+@@ -5172,7 +5172,7 @@ static int brcms_b_down_finish(struct br
+
+ /* turn off primary xtal and pll */
+ if (!wlc_hw->noreset) {
+- bcma_core_pci_down(wlc_hw->d11core->bus);
++ bcma_host_pci_down(wlc_hw->d11core->bus);
+ brcms_b_xtal(wlc_hw, OFF);
+ }
+ }
+--- a/include/linux/bcma/bcma.h
++++ b/include/linux/bcma/bcma.h
+@@ -435,6 +435,27 @@ static inline struct bcma_device *bcma_f
+ return bcma_find_core_unit(bus, coreid, 0);
+ }
+
++#ifdef CONFIG_BCMA_HOST_PCI
++extern void bcma_host_pci_up(struct bcma_bus *bus);
++extern void bcma_host_pci_down(struct bcma_bus *bus);
++extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
++ struct bcma_device *core, bool enable);
++#else
++static inline void bcma_host_pci_up(struct bcma_bus *bus)
++{
++}
++static inline void bcma_host_pci_down(struct bcma_bus *bus)
++{
++}
++static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
++ struct bcma_device *core, bool enable)
++{
++ if (bus->hosttype == BCMA_HOSTTYPE_PCI)
++ return -ENOTSUPP;
++ return 0;
++}
++#endif
++
+ extern bool bcma_core_is_enabled(struct bcma_device *core);
+ extern void bcma_core_disable(struct bcma_device *core, u32 flags);
+ extern int bcma_core_enable(struct bcma_device *core, u32 flags);
+--- a/include/linux/bcma/bcma_driver_pci.h
++++ b/include/linux/bcma/bcma_driver_pci.h
+@@ -238,13 +238,13 @@ struct bcma_drv_pci {
+ #define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
+ #define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
+
+-extern void bcma_core_pci_early_init(struct bcma_drv_pci *pc);
+-extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
+-extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
+- struct bcma_device *core, bool enable);
+-extern void bcma_core_pci_up(struct bcma_bus *bus);
+-extern void bcma_core_pci_down(struct bcma_bus *bus);
++#ifdef CONFIG_BCMA_DRIVER_PCI
+ extern void bcma_core_pci_power_save(struct bcma_bus *bus, bool up);
++#else
++static inline void bcma_core_pci_power_save(struct bcma_bus *bus, bool up)
++{
++}
++#endif
+
+ extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+ extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
+--- a/include/linux/bcma/bcma_driver_pcie2.h
++++ b/include/linux/bcma/bcma_driver_pcie2.h
+@@ -143,6 +143,8 @@
+
+ struct bcma_drv_pcie2 {
+ struct bcma_device *core;
++
++ u16 reqsize;
+ };
+
+ #define pcie2_read16(pcie2, offset) bcma_read16((pcie2)->core, offset)
+@@ -153,6 +155,4 @@ struct bcma_drv_pcie2 {
+ #define pcie2_set32(pcie2, offset, set) bcma_set32((pcie2)->core, offset, set)
+ #define pcie2_mask32(pcie2, offset, mask) bcma_mask32((pcie2)->core, offset, mask)
+
+-void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
+-
+ #endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
+--- a/drivers/bcma/Kconfig
++++ b/drivers/bcma/Kconfig
+@@ -26,6 +26,7 @@ config BCMA_HOST_PCI_POSSIBLE
+ config BCMA_HOST_PCI
+ bool "Support for BCMA on PCI-host bus"
+ depends on BCMA_HOST_PCI_POSSIBLE
++ select BCMA_DRIVER_PCI
+ default y
+
+ config BCMA_DRIVER_PCI_HOSTMODE
+@@ -44,6 +45,22 @@ config BCMA_HOST_SOC
+
+ If unsure, say N
+
++config BCMA_DRIVER_PCI
++ bool "BCMA Broadcom PCI core driver"
++ depends on BCMA && PCI
++ default y
++ help
++ BCMA bus may have many versions of PCIe core. This driver
++ supports:
++ 1) PCIe core working in clientmode
++ 2) PCIe Gen 2 clientmode core
++
++ In general PCIe (Gen 2) clientmode core is required on PCIe
++ hosted buses. It's responsible for initialization and basic
++ hardware management.
++ This driver is also prerequisite for a hostmode PCIe core
++ support.
++
+ config BCMA_DRIVER_MIPS
+ bool "BCMA Broadcom MIPS core driver"
+ depends on BCMA && MIPS
+--- a/drivers/bcma/Makefile
++++ b/drivers/bcma/Makefile
+@@ -3,8 +3,8 @@ bcma-y += driver_chipcommon.o driver
+ bcma-y += driver_chipcommon_b.o
+ bcma-$(CONFIG_BCMA_SFLASH) += driver_chipcommon_sflash.o
+ bcma-$(CONFIG_BCMA_NFLASH) += driver_chipcommon_nflash.o
+-bcma-y += driver_pci.o
+-bcma-y += driver_pcie2.o
++bcma-$(CONFIG_BCMA_DRIVER_PCI) += driver_pci.o
++bcma-$(CONFIG_BCMA_DRIVER_PCI) += driver_pcie2.o
+ bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
+ bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
+ bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN) += driver_gmac_cmn.o
+--- a/include/linux/bcma/bcma_driver_chipcommon.h
++++ b/include/linux/bcma/bcma_driver_chipcommon.h
+@@ -663,14 +663,6 @@ struct bcma_drv_cc_b {
+ #define bcma_cc_maskset32(cc, offset, mask, set) \
+ bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
+
+-extern void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
+-extern void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc);
+-
+-extern void bcma_chipco_suspend(struct bcma_drv_cc *cc);
+-extern void bcma_chipco_resume(struct bcma_drv_cc *cc);
+-
+-void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
+-
+ extern u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks);
+
+ extern u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc);
+@@ -690,9 +682,6 @@ u32 bcma_chipco_gpio_pullup(struct bcma_
+ u32 bcma_chipco_gpio_pulldown(struct bcma_drv_cc *cc, u32 mask, u32 value);
+
+ /* PMU support */
+-extern void bcma_pmu_init(struct bcma_drv_cc *cc);
+-extern void bcma_pmu_early_init(struct bcma_drv_cc *cc);
+-
+ extern void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset,
+ u32 value);
+ extern void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset,
+--- a/include/linux/bcma/bcma_driver_gmac_cmn.h
++++ b/include/linux/bcma/bcma_driver_gmac_cmn.h
+@@ -91,10 +91,4 @@ struct bcma_drv_gmac_cmn {
+ #define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)
+ #define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
+
+-#ifdef CONFIG_BCMA_DRIVER_GMAC_CMN
+-extern void bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc);
+-#else
+-static inline void bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc) { }
+-#endif
+-
+ #endif /* LINUX_BCMA_DRIVER_GMAC_CMN_H_ */
+--- a/include/linux/bcma/bcma_driver_mips.h
++++ b/include/linux/bcma/bcma_driver_mips.h
+@@ -39,21 +39,6 @@ struct bcma_drv_mips {
+ u8 early_setup_done:1;
+ };
+
+-#ifdef CONFIG_BCMA_DRIVER_MIPS
+-extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
+-extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore);
+-
+-extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
+-#else
+-static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
+-static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { }
+-
+-static inline unsigned int bcma_core_mips_irq(struct bcma_device *dev)
+-{
+- return 0;
+-}
+-#endif
+-
+ extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore);
+
+ #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */