diff options
Diffstat (limited to 'target/linux/generic/patches-4.9/075-v4.10-0003-net-phy-broadcom-add-bcm54xx_auxctl_read.patch')
| -rw-r--r-- | target/linux/generic/patches-4.9/075-v4.10-0003-net-phy-broadcom-add-bcm54xx_auxctl_read.patch | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/target/linux/generic/patches-4.9/075-v4.10-0003-net-phy-broadcom-add-bcm54xx_auxctl_read.patch b/target/linux/generic/patches-4.9/075-v4.10-0003-net-phy-broadcom-add-bcm54xx_auxctl_read.patch new file mode 100644 index 0000000000..c9b3b5911e --- /dev/null +++ b/target/linux/generic/patches-4.9/075-v4.10-0003-net-phy-broadcom-add-bcm54xx_auxctl_read.patch @@ -0,0 +1,41 @@ +From: Jon Mason <jon.mason@broadcom.com> +Date: Fri, 4 Nov 2016 01:10:56 -0400 +Subject: [PATCH] net: phy: broadcom: add bcm54xx_auxctl_read + +Add a helper function to read the AUXCTL register for the BCM54xx. This +mirrors the bcm54xx_auxctl_write function already present in the code. + +Signed-off-by: Jon Mason <jon.mason@broadcom.com> +Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -30,6 +30,16 @@ MODULE_DESCRIPTION("Broadcom PHY driver" + MODULE_AUTHOR("Maciej W. Rozycki"); + MODULE_LICENSE("GPL"); + ++static int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum) ++{ ++ /* The register must be written to both the Shadow Register Select and ++ * the Shadow Read Register Selector ++ */ ++ phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | ++ regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT); ++ return phy_read(phydev, MII_BCM54XX_AUX_CTL); ++} ++ + static int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) + { + return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -110,6 +110,7 @@ + #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 + #define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 + #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 ++#define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT 12 + + #define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007 + |