diff options
Diffstat (limited to 'target/linux/generic/patches-3.0/020-ssb_update.patch')
| -rw-r--r-- | target/linux/generic/patches-3.0/020-ssb_update.patch | 1100 |
1 files changed, 0 insertions, 1100 deletions
diff --git a/target/linux/generic/patches-3.0/020-ssb_update.patch b/target/linux/generic/patches-3.0/020-ssb_update.patch deleted file mode 100644 index 13709850d7..0000000000 --- a/target/linux/generic/patches-3.0/020-ssb_update.patch +++ /dev/null @@ -1,1100 +0,0 @@ ---- a/drivers/ssb/b43_pci_bridge.c -+++ b/drivers/ssb/b43_pci_bridge.c -@@ -5,12 +5,13 @@ - * because of its small size we include it in the SSB core - * instead of creating a standalone module. - * -- * Copyright 2007 Michael Buesch <mb@bu3sch.de> -+ * Copyright 2007 Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ - - #include <linux/pci.h> -+#include <linux/module.h> - #include <linux/ssb/ssb.h> - - #include "ssb_private.h" ---- a/drivers/ssb/driver_chipcommon.c -+++ b/drivers/ssb/driver_chipcommon.c -@@ -3,7 +3,7 @@ - * Broadcom ChipCommon core driver - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ ---- a/drivers/ssb/driver_chipcommon_pmu.c -+++ b/drivers/ssb/driver_chipcommon_pmu.c -@@ -2,7 +2,7 @@ - * Sonics Silicon Backplane - * Broadcom ChipCommon Power Management Unit driver - * -- * Copyright 2009, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2009, Michael Buesch <m@bues.ch> - * Copyright 2007, Broadcom Corporation - * - * Licensed under the GNU/GPL. See COPYING for details. -@@ -12,6 +12,9 @@ - #include <linux/ssb/ssb_regs.h> - #include <linux/ssb/ssb_driver_chipcommon.h> - #include <linux/delay.h> -+#ifdef CONFIG_BCM47XX -+#include <asm/mach-bcm47xx/nvram.h> -+#endif - - #include "ssb_private.h" - -@@ -91,10 +94,6 @@ static void ssb_pmu0_pllinit_r0(struct s - u32 pmuctl, tmp, pllctl; - unsigned int i; - -- if ((bus->chip_id == 0x5354) && !crystalfreq) { -- /* The 5354 crystal freq is 25MHz */ -- crystalfreq = 25000; -- } - if (crystalfreq) - e = pmu0_plltab_find_entry(crystalfreq); - if (!e) -@@ -320,7 +319,11 @@ static void ssb_pmu_pll_init(struct ssb_ - u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */ - - if (bus->bustype == SSB_BUSTYPE_SSB) { -- /* TODO: The user may override the crystal frequency. */ -+#ifdef CONFIG_BCM47XX -+ char buf[20]; -+ if (nvram_getenv("xtalfreq", buf, sizeof(buf)) >= 0) -+ crystalfreq = simple_strtoul(buf, NULL, 0); -+#endif - } - - switch (bus->chip_id) { -@@ -329,7 +332,11 @@ static void ssb_pmu_pll_init(struct ssb_ - ssb_pmu1_pllinit_r0(cc, crystalfreq); - break; - case 0x4328: -+ ssb_pmu0_pllinit_r0(cc, crystalfreq); -+ break; - case 0x5354: -+ if (crystalfreq == 0) -+ crystalfreq = 25000; - ssb_pmu0_pllinit_r0(cc, crystalfreq); - break; - case 0x4322: -@@ -417,9 +424,9 @@ static void ssb_pmu_resources_init(struc - u32 min_msk = 0, max_msk = 0; - unsigned int i; - const struct pmu_res_updown_tab_entry *updown_tab = NULL; -- unsigned int updown_tab_size; -+ unsigned int updown_tab_size = 0; - const struct pmu_res_depend_tab_entry *depend_tab = NULL; -- unsigned int depend_tab_size; -+ unsigned int depend_tab_size = 0; - - switch (bus->chip_id) { - case 0x4312: -@@ -606,3 +613,34 @@ void ssb_pmu_set_ldo_paref(struct ssb_ch - - EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage); - EXPORT_SYMBOL(ssb_pmu_set_ldo_paref); -+ -+u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc) -+{ -+ struct ssb_bus *bus = cc->dev->bus; -+ -+ switch (bus->chip_id) { -+ case 0x5354: -+ /* 5354 chip uses a non programmable PLL of frequency 240MHz */ -+ return 240000000; -+ default: -+ ssb_printk(KERN_ERR PFX -+ "ERROR: PMU cpu clock unknown for device %04X\n", -+ bus->chip_id); -+ return 0; -+ } -+} -+ -+u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc) -+{ -+ struct ssb_bus *bus = cc->dev->bus; -+ -+ switch (bus->chip_id) { -+ case 0x5354: -+ return 120000000; -+ default: -+ ssb_printk(KERN_ERR PFX -+ "ERROR: PMU controlclock unknown for device %04X\n", -+ bus->chip_id); -+ return 0; -+ } -+} ---- a/drivers/ssb/driver_extif.c -+++ b/drivers/ssb/driver_extif.c -@@ -3,7 +3,7 @@ - * Broadcom EXTIF core driver - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> - * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org> - * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net> - * ---- a/drivers/ssb/driver_gige.c -+++ b/drivers/ssb/driver_gige.c -@@ -3,7 +3,7 @@ - * Broadcom Gigabit Ethernet core driver - * - * Copyright 2008, Broadcom Corporation -- * Copyright 2008, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2008, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige - gige_write32(dev, SSB_GIGE_PCICFG + offset, value); - } - --static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, -- int reg, int size, u32 *val) -+static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus, -+ unsigned int devfn, int reg, -+ int size, u32 *val) - { - struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); - unsigned long flags; -@@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru - return PCIBIOS_SUCCESSFUL; - } - --static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, -- int reg, int size, u32 val) -+static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus, -+ unsigned int devfn, int reg, -+ int size, u32 val) - { - struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); - unsigned long flags; -@@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str - return PCIBIOS_SUCCESSFUL; - } - --static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id) -+static int __devinit ssb_gige_probe(struct ssb_device *sdev, -+ const struct ssb_device_id *id) - { - struct ssb_gige *dev; - u32 base, tmslow, tmshigh; ---- a/drivers/ssb/driver_mipscore.c -+++ b/drivers/ssb/driver_mipscore.c -@@ -3,7 +3,7 @@ - * Broadcom MIPS core driver - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -208,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m - struct ssb_bus *bus = mcore->dev->bus; - u32 pll_type, n, m, rate = 0; - -+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) -+ return ssb_pmu_get_cpu_clock(&bus->chipco); -+ - if (bus->extif.dev) { - ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m); - } else if (bus->chipco.dev) { ---- a/drivers/ssb/driver_pcicore.c -+++ b/drivers/ssb/driver_pcicore.c -@@ -3,7 +3,7 @@ - * Broadcom PCI-core driver - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -74,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_ - u32 tmp; - - /* We do only have one cardbus device behind the bridge. */ -- if (pc->cardbusmode && (dev >= 1)) -+ if (pc->cardbusmode && (dev > 1)) - goto out; - - if (bus == 0) { -@@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st - return ssb_mips_irq(extpci_core->dev) + 2; - } - --static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) -+static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) - { - u32 val; - -@@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st - register_pci_controller(&ssb_pcicore_controller); - } - --static int pcicore_is_in_hostmode(struct ssb_pcicore *pc) -+static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc) - { - struct ssb_bus *bus = pc->dev->bus; - u16 chipid_top; -@@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct - * Workarounds. - **************************************************/ - --static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) -+static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) - { - u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0)); - if (((tmp & 0xF000) >> 12) != pc->dev->core_index) { -@@ -514,7 +514,7 @@ static void ssb_pcicore_pcie_setup_worka - * Generic and Clientmode operation code. - **************************************************/ - --static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) -+static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) - { - struct ssb_device *pdev = pc->dev; - struct ssb_bus *bus = pdev->bus; ---- a/drivers/ssb/embedded.c -+++ b/drivers/ssb/embedded.c -@@ -3,7 +3,7 @@ - * Embedded systems support code - * - * Copyright 2005-2008, Broadcom Corporation -- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006-2008, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ ---- a/drivers/ssb/main.c -+++ b/drivers/ssb/main.c -@@ -3,7 +3,7 @@ - * Subsystem core - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -12,6 +12,7 @@ - - #include <linux/delay.h> - #include <linux/io.h> -+#include <linux/module.h> - #include <linux/ssb/ssb.h> - #include <linux/ssb/ssb_regs.h> - #include <linux/ssb/ssb_driver_gige.h> -@@ -139,19 +140,6 @@ static void ssb_device_put(struct ssb_de - put_device(dev->dev); - } - --static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv) --{ -- if (drv) -- get_driver(&drv->drv); -- return drv; --} -- --static inline void ssb_driver_put(struct ssb_driver *drv) --{ -- if (drv) -- put_driver(&drv->drv); --} -- - static int ssb_device_resume(struct device *dev) - { - struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); -@@ -249,11 +237,9 @@ int ssb_devices_freeze(struct ssb_bus *b - ssb_device_put(sdev); - continue; - } -- sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver)); -- if (!sdrv || SSB_WARN_ON(!sdrv->remove)) { -- ssb_device_put(sdev); -+ sdrv = drv_to_ssb_drv(sdev->dev->driver); -+ if (SSB_WARN_ON(!sdrv->remove)) - continue; -- } - sdrv->remove(sdev); - ctx->device_frozen[i] = 1; - } -@@ -292,7 +278,6 @@ int ssb_devices_thaw(struct ssb_freeze_c - dev_name(sdev->dev)); - result = err; - } -- ssb_driver_put(sdrv); - ssb_device_put(sdev); - } - -@@ -557,7 +542,7 @@ error: - } - - /* Needs ssb_buses_lock() */ --static int ssb_attach_queued_buses(void) -+static int __devinit ssb_attach_queued_buses(void) - { - struct ssb_bus *bus, *n; - int err = 0; -@@ -768,9 +753,9 @@ out: - return err; - } - --static int ssb_bus_register(struct ssb_bus *bus, -- ssb_invariants_func_t get_invariants, -- unsigned long baseaddr) -+static int __devinit ssb_bus_register(struct ssb_bus *bus, -+ ssb_invariants_func_t get_invariants, -+ unsigned long baseaddr) - { - int err; - -@@ -851,8 +836,8 @@ err_disable_xtal: - } - - #ifdef CONFIG_SSB_PCIHOST --int ssb_bus_pcibus_register(struct ssb_bus *bus, -- struct pci_dev *host_pci) -+int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus, -+ struct pci_dev *host_pci) - { - int err; - -@@ -875,9 +860,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); - #endif /* CONFIG_SSB_PCIHOST */ - - #ifdef CONFIG_SSB_PCMCIAHOST --int ssb_bus_pcmciabus_register(struct ssb_bus *bus, -- struct pcmcia_device *pcmcia_dev, -- unsigned long baseaddr) -+int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus, -+ struct pcmcia_device *pcmcia_dev, -+ unsigned long baseaddr) - { - int err; - -@@ -897,8 +882,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register - #endif /* CONFIG_SSB_PCMCIAHOST */ - - #ifdef CONFIG_SSB_SDIOHOST --int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func, -- unsigned int quirks) -+int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus, -+ struct sdio_func *func, -+ unsigned int quirks) - { - int err; - -@@ -918,9 +904,9 @@ int ssb_bus_sdiobus_register(struct ssb_ - EXPORT_SYMBOL(ssb_bus_sdiobus_register); - #endif /* CONFIG_SSB_PCMCIAHOST */ - --int ssb_bus_ssbbus_register(struct ssb_bus *bus, -- unsigned long baseaddr, -- ssb_invariants_func_t get_invariants) -+int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus, -+ unsigned long baseaddr, -+ ssb_invariants_func_t get_invariants) - { - int err; - -@@ -1001,8 +987,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 - switch (plltype) { - case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ - if (m & SSB_CHIPCO_CLK_T6_MMASK) -- return SSB_CHIPCO_CLK_T6_M0; -- return SSB_CHIPCO_CLK_T6_M1; -+ return SSB_CHIPCO_CLK_T6_M1; -+ return SSB_CHIPCO_CLK_T6_M0; - case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ - case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ - case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ -@@ -1092,6 +1078,9 @@ u32 ssb_clockspeed(struct ssb_bus *bus) - u32 plltype; - u32 clkctl_n, clkctl_m; - -+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) -+ return ssb_pmu_get_controlclock(&bus->chipco); -+ - if (ssb_extif_available(&bus->extif)) - ssb_extif_get_clockcontrol(&bus->extif, &plltype, - &clkctl_n, &clkctl_m); -@@ -1259,13 +1248,34 @@ void ssb_device_disable(struct ssb_devic - } - EXPORT_SYMBOL(ssb_device_disable); - -+/* Some chipsets need routing known for PCIe and 64-bit DMA */ -+static bool ssb_dma_translation_special_bit(struct ssb_device *dev) -+{ -+ u16 chip_id = dev->bus->chip_id; -+ -+ if (dev->id.coreid == SSB_DEV_80211) { -+ return (chip_id == 0x4322 || chip_id == 43221 || -+ chip_id == 43231 || chip_id == 43222); -+ } -+ -+ return 0; -+} -+ - u32 ssb_dma_translation(struct ssb_device *dev) - { - switch (dev->bus->bustype) { - case SSB_BUSTYPE_SSB: - return 0; - case SSB_BUSTYPE_PCI: -- return SSB_PCI_DMA; -+ if (pci_is_pcie(dev->bus->host_pci) && -+ ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) { -+ return SSB_PCIE_DMA_H32; -+ } else { -+ if (ssb_dma_translation_special_bit(dev)) -+ return SSB_PCIE_DMA_H32; -+ else -+ return SSB_PCI_DMA; -+ } - default: - __ssb_dma_not_implemented(dev); - } ---- a/drivers/ssb/pci.c -+++ b/drivers/ssb/pci.c -@@ -1,7 +1,7 @@ - /* - * Sonics Silicon Backplane PCI-Hostbus related functions. - * -- * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de> -+ * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch> - * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> - * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> - * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> -@@ -331,7 +331,6 @@ static void sprom_extract_r123(struct ss - { - int i; - u16 v; -- s8 gain; - u16 loc[3]; - - if (out->revision == 3) /* rev 3 moved MAC */ -@@ -390,20 +389,12 @@ static void sprom_extract_r123(struct ss - SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); - - /* Extract the antenna gain values. */ -- gain = r123_extract_antgain(out->revision, in, -- SSB_SPROM1_AGAIN_BG, -- SSB_SPROM1_AGAIN_BG_SHIFT); -- out->antenna_gain.ghz24.a0 = gain; -- out->antenna_gain.ghz24.a1 = gain; -- out->antenna_gain.ghz24.a2 = gain; -- out->antenna_gain.ghz24.a3 = gain; -- gain = r123_extract_antgain(out->revision, in, -- SSB_SPROM1_AGAIN_A, -- SSB_SPROM1_AGAIN_A_SHIFT); -- out->antenna_gain.ghz5.a0 = gain; -- out->antenna_gain.ghz5.a1 = gain; -- out->antenna_gain.ghz5.a2 = gain; -- out->antenna_gain.ghz5.a3 = gain; -+ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, -+ SSB_SPROM1_AGAIN_BG, -+ SSB_SPROM1_AGAIN_BG_SHIFT); -+ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, -+ SSB_SPROM1_AGAIN_A, -+ SSB_SPROM1_AGAIN_A_SHIFT); - } - - /* Revs 4 5 and 8 have partially shared layout */ -@@ -504,16 +495,14 @@ static void sprom_extract_r45(struct ssb - } - - /* Extract the antenna gain values. */ -- SPEX(antenna_gain.ghz24.a0, SSB_SPROM4_AGAIN01, -+ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, - SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); -- SPEX(antenna_gain.ghz24.a1, SSB_SPROM4_AGAIN01, -+ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, - SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); -- SPEX(antenna_gain.ghz24.a2, SSB_SPROM4_AGAIN23, -+ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, - SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); -- SPEX(antenna_gain.ghz24.a3, SSB_SPROM4_AGAIN23, -+ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, - SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); -- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, -- sizeof(out->antenna_gain.ghz5)); - - sprom_extract_r458(out, in); - -@@ -523,7 +512,13 @@ static void sprom_extract_r45(struct ssb - static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) - { - int i; -- u16 v; -+ u16 v, o; -+ u16 pwr_info_offset[] = { -+ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, -+ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 -+ }; -+ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != -+ ARRAY_SIZE(out->core_pwr_info)); - - /* extract the MAC address */ - for (i = 0; i < 3; i++) { -@@ -596,16 +591,69 @@ static void sprom_extract_r8(struct ssb_ - SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); - - /* Extract the antenna gain values. */ -- SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01, -+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, - SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); -- SPEX(antenna_gain.ghz24.a1, SSB_SPROM8_AGAIN01, -+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, - SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); -- SPEX(antenna_gain.ghz24.a2, SSB_SPROM8_AGAIN23, -+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, - SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); -- SPEX(antenna_gain.ghz24.a3, SSB_SPROM8_AGAIN23, -+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, - SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); -- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, -- sizeof(out->antenna_gain.ghz5)); -+ -+ /* Extract cores power info info */ -+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { -+ o = pwr_info_offset[i]; -+ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, -+ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); -+ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, -+ SSB_SPROM8_2G_MAXP, 0); -+ -+ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); -+ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); -+ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); -+ -+ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, -+ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); -+ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, -+ SSB_SPROM8_5G_MAXP, 0); -+ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, -+ SSB_SPROM8_5GH_MAXP, 0); -+ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, -+ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); -+ -+ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); -+ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); -+ } -+ -+ /* Extract FEM info */ -+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, -+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); -+ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, -+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); -+ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, -+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); -+ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, -+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); -+ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, -+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); -+ -+ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, -+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); -+ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, -+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); -+ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, -+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); -+ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, -+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); -+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, -+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); - - sprom_extract_r458(out, in); - -@@ -734,12 +782,9 @@ out_free: - static void ssb_pci_get_boardinfo(struct ssb_bus *bus, - struct ssb_boardinfo *bi) - { -- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID, -- &bi->vendor); -- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID, -- &bi->type); -- pci_read_config_word(bus->host_pci, PCI_REVISION_ID, -- &bi->rev); -+ bi->vendor = bus->host_pci->subsystem_vendor; -+ bi->type = bus->host_pci->subsystem_device; -+ bi->rev = bus->host_pci->revision; - } - - int ssb_pci_get_invariants(struct ssb_bus *bus, ---- a/drivers/ssb/pcihost_wrapper.c -+++ b/drivers/ssb/pcihost_wrapper.c -@@ -6,7 +6,7 @@ - * Copyright (c) 2005 Stefano Brivio <st3@riseup.net> - * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> - * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> -- * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de> -+ * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci - # define ssb_pcihost_resume NULL - #endif /* CONFIG_PM */ - --static int ssb_pcihost_probe(struct pci_dev *dev, -- const struct pci_device_id *id) -+static int __devinit ssb_pcihost_probe(struct pci_dev *dev, -+ const struct pci_device_id *id) - { - struct ssb_bus *ssb; - int err = -ENOMEM; -@@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc - pci_set_drvdata(dev, NULL); - } - --int ssb_pcihost_register(struct pci_driver *driver) -+int __devinit ssb_pcihost_register(struct pci_driver *driver) - { - driver->probe = ssb_pcihost_probe; - driver->remove = ssb_pcihost_remove; ---- a/drivers/ssb/pcmcia.c -+++ b/drivers/ssb/pcmcia.c -@@ -3,7 +3,7 @@ - * PCMCIA-Hostbus related functions - * - * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> -- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de> -+ * Copyright 2007-2008 Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - */ -@@ -676,14 +676,10 @@ static int ssb_pcmcia_do_get_invariants( - case SSB_PCMCIA_CIS_ANTGAIN: - GOTO_ERROR_ON(tuple->TupleDataLen != 2, - "antg tpl size"); -- sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1]; -- sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1]; -+ sprom->antenna_gain.a0 = tuple->TupleData[1]; -+ sprom->antenna_gain.a1 = tuple->TupleData[1]; -+ sprom->antenna_gain.a2 = tuple->TupleData[1]; -+ sprom->antenna_gain.a3 = tuple->TupleData[1]; - break; - case SSB_PCMCIA_CIS_BFLAGS: - GOTO_ERROR_ON((tuple->TupleDataLen != 3) && ---- a/drivers/ssb/scan.c -+++ b/drivers/ssb/scan.c -@@ -2,7 +2,7 @@ - * Sonics Silicon Backplane - * Bus scanning - * -- * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de> -+ * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch> - * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> - * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> - * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> -@@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus, - } else { - if (bus->bustype == SSB_BUSTYPE_PCI) { - bus->chip_id = pcidev_to_chipid(bus->host_pci); -- pci_read_config_byte(bus->host_pci, PCI_REVISION_ID, -- &bus->chip_rev); -+ bus->chip_rev = bus->host_pci->revision; - bus->chip_package = 0; - } else { - bus->chip_id = 0x4710; -@@ -319,6 +318,9 @@ int ssb_bus_scan(struct ssb_bus *bus, - bus->chip_package = 0; - } - } -+ ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and " -+ "package 0x%02X\n", bus->chip_id, bus->chip_rev, -+ bus->chip_package); - if (!bus->nr_devices) - bus->nr_devices = chipid_to_nrcores(bus->chip_id); - if (bus->nr_devices > ARRAY_SIZE(bus->devices)) { ---- a/drivers/ssb/sdio.c -+++ b/drivers/ssb/sdio.c -@@ -6,7 +6,7 @@ - * - * Based on drivers/ssb/pcmcia.c - * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> -- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de> -+ * Copyright 2007-2008 Michael Buesch <m@bues.ch> - * - * Licensed under the GNU/GPL. See COPYING for details. - * -@@ -551,14 +551,10 @@ int ssb_sdio_get_invariants(struct ssb_b - case SSB_SDIO_CIS_ANTGAIN: - GOTO_ERROR_ON(tuple->size != 2, - "antg tpl size"); -- sprom->antenna_gain.ghz24.a0 = tuple->data[1]; -- sprom->antenna_gain.ghz24.a1 = tuple->data[1]; -- sprom->antenna_gain.ghz24.a2 = tuple->data[1]; -- sprom->antenna_gain.ghz24.a3 = tuple->data[1]; -- sprom->antenna_gain.ghz5.a0 = tuple->data[1]; -- sprom->antenna_gain.ghz5.a1 = tuple->data[1]; -- sprom->antenna_gain.ghz5.a2 = tuple->data[1]; -- sprom->antenna_gain.ghz5.a3 = tuple->data[1]; -+ sprom->antenna_gain.a0 = tuple->data[1]; -+ sprom->antenna_gain.a1 = tuple->data[1]; -+ sprom->antenna_gain.a2 = tuple->data[1]; -+ sprom->antenna_gain.a3 = tuple->data[1]; - break; - case SSB_SDIO_CIS_BFLAGS: - GOTO_ERROR_ON((tuple->size != 3) && ---- a/drivers/ssb/sprom.c -+++ b/drivers/ssb/sprom.c -@@ -2,7 +2,7 @@ - * Sonics Silicon Backplane - * Common SPROM support routines - * -- * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de> -+ * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch> - * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> - * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> - * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> ---- a/include/linux/ssb/ssb.h -+++ b/include/linux/ssb/ssb.h -@@ -16,6 +16,12 @@ struct pcmcia_device; - struct ssb_bus; - struct ssb_driver; - -+struct ssb_sprom_core_pwr_info { -+ u8 itssi_2g, itssi_5g; -+ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh; -+ u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4]; -+}; -+ - struct ssb_sprom { - u8 revision; - u8 il0mac[6]; /* MAC address for 802.11b/g */ -@@ -25,8 +31,13 @@ struct ssb_sprom { - u8 et1phyaddr; /* MII address for enet1 */ - u8 et0mdcport; /* MDIO for enet0 */ - u8 et1mdcport; /* MDIO for enet1 */ -- u8 board_rev; /* Board revision number from SPROM. */ -+ u16 board_rev; /* Board revision number from SPROM. */ -+ u16 board_num; /* Board number from SPROM. */ -+ u16 board_type; /* Board type from SPROM. */ - u8 country_code; /* Country Code */ -+ char alpha2[2]; /* Country Code as two chars like EU or US */ -+ u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */ -+ u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ - u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ - u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ - u16 pa0b0; -@@ -45,10 +56,10 @@ struct ssb_sprom { - u8 gpio1; /* GPIO pin 1 */ - u8 gpio2; /* GPIO pin 2 */ - u8 gpio3; /* GPIO pin 3 */ -- u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ -- u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ -- u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ -- u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ -+ u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ -+ u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ -+ u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ -+ u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ - u8 itssi_a; /* Idle TSSI Target for A-PHY */ - u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ - u8 tri2g; /* 2.4GHz TX isolation */ -@@ -59,8 +70,8 @@ struct ssb_sprom { - u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ - u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ - u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ -- u8 rxpo2g; /* 2GHz RX power offset */ -- u8 rxpo5g; /* 5GHz RX power offset */ -+ s8 rxpo2g; /* 2GHz RX power offset */ -+ s8 rxpo5g; /* 5GHz RX power offset */ - u8 rssisav2g; /* 2GHz RSSI params */ - u8 rssismc2g; - u8 rssismf2g; -@@ -80,26 +91,104 @@ struct ssb_sprom { - u16 boardflags2_hi; /* Board flags (bits 48-63) */ - /* TODO store board flags in a single u64 */ - -+ struct ssb_sprom_core_pwr_info core_pwr_info[4]; -+ - /* Antenna gain values for up to 4 antennas - * on each band. Values in dBm/4 (Q5.2). Negative gain means the - * loss in the connectors is bigger than the gain. */ - struct { -- struct { -- s8 a0, a1, a2, a3; -- } ghz24; /* 2.4GHz band */ -- struct { -- s8 a0, a1, a2, a3; -- } ghz5; /* 5GHz band */ -+ s8 a0, a1, a2, a3; - } antenna_gain; - -- /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ -+ struct { -+ struct { -+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut; -+ } ghz2; -+ struct { -+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut; -+ } ghz5; -+ } fem; -+ -+ u16 mcs2gpo[8]; -+ u16 mcs5gpo[8]; -+ u16 mcs5glpo[8]; -+ u16 mcs5ghpo[8]; -+ u8 opo; -+ -+ u8 rxgainerr2ga[3]; -+ u8 rxgainerr5gla[3]; -+ u8 rxgainerr5gma[3]; -+ u8 rxgainerr5gha[3]; -+ u8 rxgainerr5gua[3]; -+ -+ u8 noiselvl2ga[3]; -+ u8 noiselvl5gla[3]; -+ u8 noiselvl5gma[3]; -+ u8 noiselvl5gha[3]; -+ u8 noiselvl5gua[3]; -+ -+ u8 regrev; -+ u8 txchain; -+ u8 rxchain; -+ u8 antswitch; -+ u16 cddpo; -+ u16 stbcpo; -+ u16 bw40po; -+ u16 bwduppo; -+ -+ u8 tempthresh; -+ u8 tempoffset; -+ u16 rawtempsense; -+ u8 measpower; -+ u8 tempsense_slope; -+ u8 tempcorrx; -+ u8 tempsense_option; -+ u8 freqoffset_corr; -+ u8 iqcal_swp_dis; -+ u8 hw_iqcal_en; -+ u8 elna2g; -+ u8 elna5g; -+ u8 phycal_tempdelta; -+ u8 temps_period; -+ u8 temps_hysteresis; -+ u8 measpower1; -+ u8 measpower2; -+ u8 pcieingress_war; -+ -+ /* power per rate from sromrev 9 */ -+ u16 cckbw202gpo; -+ u16 cckbw20ul2gpo; -+ u32 legofdmbw202gpo; -+ u32 legofdmbw20ul2gpo; -+ u32 legofdmbw205glpo; -+ u32 legofdmbw20ul5glpo; -+ u32 legofdmbw205gmpo; -+ u32 legofdmbw20ul5gmpo; -+ u32 legofdmbw205ghpo; -+ u32 legofdmbw20ul5ghpo; -+ u32 mcsbw202gpo; -+ u32 mcsbw20ul2gpo; -+ u32 mcsbw402gpo; -+ u32 mcsbw205glpo; -+ u32 mcsbw20ul5glpo; -+ u32 mcsbw405glpo; -+ u32 mcsbw205gmpo; -+ u32 mcsbw20ul5gmpo; -+ u32 mcsbw405gmpo; -+ u32 mcsbw205ghpo; -+ u32 mcsbw20ul5ghpo; -+ u32 mcsbw405ghpo; -+ u16 mcs32po; -+ u16 legofdm40duppo; -+ u8 sar2g; -+ u8 sar5g; - }; - - /* Information about the PCB the circuitry is soldered on. */ - struct ssb_boardinfo { - u16 vendor; - u16 type; -- u16 rev; -+ u8 rev; - }; - - -@@ -229,10 +318,9 @@ struct ssb_driver { - #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) - - extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); --static inline int ssb_driver_register(struct ssb_driver *drv) --{ -- return __ssb_driver_register(drv, THIS_MODULE); --} -+#define ssb_driver_register(drv) \ -+ __ssb_driver_register(drv, THIS_MODULE) -+ - extern void ssb_driver_unregister(struct ssb_driver *drv); - - ---- a/include/linux/ssb/ssb_driver_chipcommon.h -+++ b/include/linux/ssb/ssb_driver_chipcommon.h -@@ -8,7 +8,7 @@ - * gpio interface, extbus, and support for serial and parallel flashes. - * - * Copyright 2005, Broadcom Corporation -- * Copyright 2006, Michael Buesch <mb@bu3sch.de> -+ * Copyright 2006, Michael Buesch <m@bues.ch> - * - * Licensed under the GPL version 2. See COPYING for details. - */ ---- a/include/linux/ssb/ssb_regs.h -+++ b/include/linux/ssb/ssb_regs.h -@@ -432,6 +432,56 @@ - #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ - #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ - #define SSB_SPROM8_RXPO5G_SHIFT 8 -+#define SSB_SPROM8_FEM2G 0x00AE -+#define SSB_SPROM8_FEM5G 0x00B0 -+#define SSB_SROM8_FEM_TSSIPOS 0x0001 -+#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0 -+#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006 -+#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1 -+#define SSB_SROM8_FEM_PDET_RANGE 0x00F8 -+#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3 -+#define SSB_SROM8_FEM_TR_ISO 0x0700 -+#define SSB_SROM8_FEM_TR_ISO_SHIFT 8 -+#define SSB_SROM8_FEM_ANTSWLUT 0xF800 -+#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11 -+#define SSB_SPROM8_THERMAL 0x00B2 -+#define SSB_SPROM8_MPWR_RAWTS 0x00B4 -+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 -+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 -+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA -+ -+/* There are 4 blocks with power info sharing the same layout */ -+#define SSB_SROM8_PWR_INFO_CORE0 0x00C0 -+#define SSB_SROM8_PWR_INFO_CORE1 0x00E0 -+#define SSB_SROM8_PWR_INFO_CORE2 0x0100 -+#define SSB_SROM8_PWR_INFO_CORE3 0x0120 -+ -+#define SSB_SROM8_2G_MAXP_ITSSI 0x00 -+#define SSB_SPROM8_2G_MAXP 0x00FF -+#define SSB_SPROM8_2G_ITSSI 0xFF00 -+#define SSB_SPROM8_2G_ITSSI_SHIFT 8 -+#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */ -+#define SSB_SROM8_2G_PA_1 0x04 -+#define SSB_SROM8_2G_PA_2 0x06 -+#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */ -+#define SSB_SPROM8_5G_MAXP 0x00FF -+#define SSB_SPROM8_5G_ITSSI 0xFF00 -+#define SSB_SPROM8_5G_ITSSI_SHIFT 8 -+#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */ -+#define SSB_SPROM8_5GH_MAXP 0x00FF -+#define SSB_SPROM8_5GL_MAXP 0xFF00 -+#define SSB_SPROM8_5GL_MAXP_SHIFT 8 -+#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */ -+#define SSB_SROM8_5G_PA_1 0x0E -+#define SSB_SROM8_5G_PA_2 0x10 -+#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */ -+#define SSB_SROM8_5GL_PA_1 0x14 -+#define SSB_SROM8_5GL_PA_2 0x16 -+#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */ -+#define SSB_SROM8_5GH_PA_1 0x1A -+#define SSB_SROM8_5GH_PA_2 0x1C -+ -+/* TODO: Make it deprecated */ - #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */ - #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ - #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ -@@ -456,12 +506,53 @@ - #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */ - #define SSB_SPROM8_PA1HIB1 0x00DA - #define SSB_SPROM8_PA1HIB2 0x00DC -+ - #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */ - #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */ - #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ - #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ - #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ - -+/* Values for boardflags_lo read from SPROM */ -+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ -+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ -+#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */ -+#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */ -+#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */ -+#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */ -+#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */ -+#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */ -+#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */ -+#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */ -+#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */ -+#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */ -+#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */ -+#define SSB_BFL_HGPA 0x2000 /* had high gain PA */ -+#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */ -+#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */ -+ -+/* Values for boardflags_hi read from SPROM */ -+#define SSB_BFH_NOPA 0x0001 /* has no PA */ -+#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */ -+#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */ -+#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */ -+#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */ -+#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */ -+#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */ -+ -+/* Values for boardflags2_lo read from SPROM */ -+#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */ -+#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ -+#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */ -+#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */ -+#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */ -+#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */ -+#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */ -+#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ -+#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */ -+#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ -+#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ -+ - /* Values for SSB_SPROM1_BINF_CCODE */ - enum { - SSB_SPROM1CCODE_WORLD = 0, ---- a/drivers/ssb/ssb_private.h -+++ b/drivers/ssb/ssb_private.h -@@ -207,4 +207,8 @@ static inline void b43_pci_ssb_bridge_ex - } - #endif /* CONFIG_SSB_B43_PCI_BRIDGE */ - -+/* driver_chipcommon_pmu.c */ -+extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); -+extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); -+ - #endif /* LINUX_SSB_PRIVATE_H_ */ ---- a/include/linux/ssb/ssb_driver_gige.h -+++ b/include/linux/ssb/ssb_driver_gige.h -@@ -2,6 +2,7 @@ - #define LINUX_SSB_DRIVER_GIGE_H_ - - #include <linux/ssb/ssb.h> -+#include <linux/bug.h> - #include <linux/pci.h> - #include <linux/spinlock.h> - |