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Diffstat (limited to 'target/linux/generic/patches-2.6.30/941-ssb_update.patch')
-rw-r--r--target/linux/generic/patches-2.6.30/941-ssb_update.patch137
1 files changed, 114 insertions, 23 deletions
diff --git a/target/linux/generic/patches-2.6.30/941-ssb_update.patch b/target/linux/generic/patches-2.6.30/941-ssb_update.patch
index 71f5b74a7e..b27270aba5 100644
--- a/target/linux/generic/patches-2.6.30/941-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.30/941-ssb_update.patch
@@ -225,7 +225,7 @@
* Copyright 2007, Broadcom Corporation
*
* Licensed under the GNU/GPL. See COPYING for details.
-@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct
+@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct
chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value);
}
@@ -289,7 +289,7 @@
u32 pmucap;
if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
-@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon
ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
cc->pmu.rev, pmucap);
@@ -1720,7 +1720,7 @@
static inline u8 ssb_crc8(u8 crc, u8 data)
{
-@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus
+@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus
int i;
for (i = 0; i < bus->sprom_size; i++)
@@ -1800,7 +1800,7 @@
}
SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -464,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -464,22 +515,32 @@ static void sprom_extract_r45(struct ssb
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
@@ -1809,7 +1809,17 @@
/* TODO - get remaining rev 4 stuff needed */
}
-@@ -474,12 +527,14 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ int i;
+- u16 v;
++ u16 v, o;
++ u16 pwr_info_offset[] = {
++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++ };
++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++ ARRAY_SIZE(out->core_pwr_info));
/* extract the MAC address */
for (i = 0; i < 3; i++) {
@@ -1825,7 +1835,7 @@
SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
SSB_SPROM8_ANTAVAIL_A_SHIFT);
SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-@@ -490,12 +545,55 @@ static void sprom_extract_r8(struct ssb_
+@@ -490,12 +551,55 @@ static void sprom_extract_r8(struct ssb_
SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
SSB_SPROM8_ITSSI_A_SHIFT);
@@ -1881,10 +1891,42 @@
/* Extract the antenna gain values. */
SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
-@@ -509,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+@@ -509,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
++ /* Extract cores power info info */
++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++ o = pwr_info_offset[i];
++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_MAXP, 0);
++
++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GH_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++ }
++
+ /* Extract FEM info */
+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@@ -1913,7 +1955,7 @@
/* TODO - get remaining rev 8 stuff needed */
}
-@@ -521,36 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -521,36 +682,34 @@ static int sprom_extract(struct ssb_bus
ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
@@ -1971,7 +2013,7 @@
}
if (out->boardflags_lo == 0xFFFF)
-@@ -564,13 +685,34 @@ static int sprom_extract(struct ssb_bus
+@@ -564,13 +723,34 @@ static int sprom_extract(struct ssb_bus
static int ssb_pci_sprom_get(struct ssb_bus *bus,
struct ssb_sprom *sprom)
{
@@ -2009,7 +2051,7 @@
bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
sprom_do_read(bus, buf);
err = sprom_check_crc(buf, bus->sprom_size);
-@@ -580,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -580,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
GFP_KERNEL);
if (!buf)
@@ -2039,7 +2081,7 @@
err = 0;
goto out_free;
}
-@@ -602,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -602,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
out_free:
kfree(buf);
@@ -2451,7 +2493,7 @@
}
bus->mmio = NULL;
bus->mapped_device = NULL;
-@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct
+@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct
SSB_BUG_ON(1); /* Can't reach this code. */
#endif
break;
@@ -3391,7 +3433,20 @@
#define PCI_DEVICE_ID_TIGON3_5752M 0x1601
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -25,26 +25,62 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+
++struct ssb_sprom_core_pwr_info {
++ u8 itssi_2g, itssi_5g;
++ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
++ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
++};
++
+ struct ssb_sprom {
+ u8 revision;
+ u8 il0mac[6]; /* MAC address for 802.11b/g */
+@@ -25,26 +31,64 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
@@ -3458,10 +3513,12 @@
+ u16 boardflags2_lo; /* Board flags (bits 32-47) */
+ u16 boardflags2_hi; /* Board flags (bits 48-63) */
+ /* TODO store board flags in a single u64 */
++
++ struct ssb_sprom_core_pwr_info core_pwr_info[4];
/* Antenna gain values for up to 4 antennas
* on each band. Values in dBm/4 (Q5.2). Negative gain means the
-@@ -58,14 +94,23 @@ struct ssb_sprom {
+@@ -58,14 +102,23 @@ struct ssb_sprom {
} ghz5; /* 5GHz band */
} antenna_gain;
@@ -3487,7 +3544,7 @@
};
-@@ -137,7 +182,7 @@ struct ssb_device {
+@@ -137,7 +190,7 @@ struct ssb_device {
* is an optimization. */
const struct ssb_bus_ops *ops;
@@ -3496,7 +3553,7 @@
struct ssb_bus *bus;
struct ssb_device_id id;
-@@ -195,10 +240,9 @@ struct ssb_driver {
+@@ -195,10 +248,9 @@ struct ssb_driver {
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@@ -3510,7 +3567,7 @@
extern void ssb_driver_unregister(struct ssb_driver *drv);
-@@ -208,6 +252,7 @@ enum ssb_bustype {
+@@ -208,6 +260,7 @@ enum ssb_bustype {
SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
@@ -3518,7 +3575,7 @@
};
/* board_vendor */
-@@ -238,20 +283,33 @@ struct ssb_bus {
+@@ -238,20 +291,33 @@ struct ssb_bus {
const struct ssb_bus_ops *ops;
@@ -3560,7 +3617,7 @@
#ifdef CONFIG_SSB_SPROM
/* Mutex to protect the SPROM writing. */
-@@ -260,7 +318,8 @@ struct ssb_bus {
+@@ -260,7 +326,8 @@ struct ssb_bus {
/* ID information about the Chip. */
u16 chip_id;
@@ -3570,7 +3627,7 @@
u16 sprom_size; /* number of words in sprom */
u8 chip_package;
-@@ -306,6 +365,11 @@ struct ssb_bus {
+@@ -306,6 +373,11 @@ struct ssb_bus {
#endif /* DEBUG */
};
@@ -3582,7 +3639,7 @@
/* The initialization-invariants. */
struct ssb_init_invariants {
/* Versioning information about the PCB. */
-@@ -336,12 +400,23 @@ extern int ssb_bus_pcmciabus_register(st
+@@ -336,12 +408,23 @@ extern int ssb_bus_pcmciabus_register(st
struct pcmcia_device *pcmcia_dev,
unsigned long baseaddr);
#endif /* CONFIG_SSB_PCMCIAHOST */
@@ -3607,7 +3664,7 @@
/* Suspend a SSB bus.
* Call this from the parent bus suspend routine. */
-@@ -612,6 +687,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -612,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
@@ -3876,7 +3933,7 @@
#define SSB_SPROM3_CCKPO_1M 0x000F /* 1M Rate PO */
#define SSB_SPROM3_CCKPO_2M 0x00F0 /* 2M Rate PO */
#define SSB_SPROM3_CCKPO_2M_SHIFT 4
-@@ -264,104 +267,257 @@
+@@ -264,104 +267,291 @@
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
/* SPROM Revision 4 */
@@ -4117,6 +4174,39 @@
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
++
++/* There are 4 blocks with power info sharing the same layout */
++#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
++#define SSB_SROM8_PWR_INFO_CORE1 0x00E0
++#define SSB_SROM8_PWR_INFO_CORE2 0x0100
++#define SSB_SROM8_PWR_INFO_CORE3 0x0120
++
++#define SSB_SROM8_2G_MAXP_ITSSI 0x00
++#define SSB_SPROM8_2G_MAXP 0x00FF
++#define SSB_SPROM8_2G_ITSSI 0xFF00
++#define SSB_SPROM8_2G_ITSSI_SHIFT 8
++#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */
++#define SSB_SROM8_2G_PA_1 0x04
++#define SSB_SROM8_2G_PA_2 0x06
++#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */
++#define SSB_SPROM8_5G_MAXP 0x00FF
++#define SSB_SPROM8_5G_ITSSI 0xFF00
++#define SSB_SPROM8_5G_ITSSI_SHIFT 8
++#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */
++#define SSB_SPROM8_5GH_MAXP 0x00FF
++#define SSB_SPROM8_5GL_MAXP 0xFF00
++#define SSB_SPROM8_5GL_MAXP_SHIFT 8
++#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */
++#define SSB_SROM8_5G_PA_1 0x0E
++#define SSB_SROM8_5G_PA_2 0x10
++#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */
++#define SSB_SROM8_5GL_PA_1 0x14
++#define SSB_SROM8_5GL_PA_2 0x16
++#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */
++#define SSB_SROM8_5GH_PA_1 0x1A
++#define SSB_SROM8_5GH_PA_2 0x1C
++
++/* TODO: Make it deprecated */
+#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
+#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
@@ -4143,6 +4233,7 @@
+#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
+#define SSB_SPROM8_PA1HIB1 0x00DA
+#define SSB_SPROM8_PA1HIB2 0x00DC
++
+#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
+#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
+#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-03 08:26:39 +0000