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Diffstat (limited to 'target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch')
-rw-r--r--target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch59
1 files changed, 0 insertions, 59 deletions
diff --git a/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch b/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch
deleted file mode 100644
index dc01c5f85d..0000000000
--- a/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 7d8dc1f7cd007a7ce94c5b4c20d63a8b8d6d7751 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
-Date: Tue, 30 Nov 2021 18:29:06 +0100
-Subject: [PATCH] PCI: aardvark: Clear all MSIs at setup
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We already clear all the other interrupts (ISR0, ISR1, HOST_CTRL_INT).
-
-Define a new macro PCIE_MSI_ALL_MASK and do the same clearing for MSIs,
-to ensure that we don't start receiving spurious interrupts.
-
-Use this new mask in advk_pcie_handle_msi();
-
-Link: https://lore.kernel.org/r/20211130172913.9727-5-kabel@kernel.org
-Signed-off-by: Pali Rohár <pali@kernel.org>
-Signed-off-by: Marek Behún <kabel@kernel.org>
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
----
- drivers/pci/controller/pci-aardvark.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/controller/pci-aardvark.c
-+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -114,6 +114,7 @@
- #define PCIE_MSI_ADDR_HIGH_REG (CONTROL_BASE_ADDR + 0x54)
- #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58)
- #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C)
-+#define PCIE_MSI_ALL_MASK GENMASK(31, 0)
- #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C)
- #define PCIE_MSI_DATA_MASK GENMASK(15, 0)
-
-@@ -577,6 +578,7 @@ static void advk_pcie_setup_hw(struct ad
- advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
-
- /* Clear all interrupts */
-+ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG);
- advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG);
- advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
- advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
-@@ -589,7 +591,7 @@ static void advk_pcie_setup_hw(struct ad
- advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);
-
- /* Unmask all MSIs */
-- advk_writel(pcie, 0, PCIE_MSI_MASK_REG);
-+ advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);
-
- /* Enable summary interrupt for GIC SPI source */
- reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK);
-@@ -1397,7 +1399,7 @@ static void advk_pcie_handle_msi(struct
-
- msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
- msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
-- msi_status = msi_val & ~msi_mask;
-+ msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK);
-
- for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) {
- if (!(BIT(msi_idx) & msi_status))