diff options
Diffstat (limited to 'target/linux/brcm47xx')
3 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.28/170-128MB_ram_bugfix.patch b/target/linux/brcm47xx/patches-2.6.28/170-128MB_ram_bugfix.patch new file mode 100644 index 0000000000..e54e3de409 --- /dev/null +++ b/target/linux/brcm47xx/patches-2.6.28/170-128MB_ram_bugfix.patch @@ -0,0 +1,17 @@ +--- a/arch/mips/bcm47xx/prom.c ++++ b/arch/mips/bcm47xx/prom.c +@@ -141,6 +141,14 @@ static __init void prom_init_mem(void) + break; + } + ++ /* Ignoring the last page when ddr size is 128M. Cached ++ * accesses to last page is causing the processor to prefetch ++ * using address above 128M stepping out of the ddr address ++ * space. ++ */ ++ if (mem == 0x8000000) ++ mem -= 0x1000; ++ + add_memory_region(0, mem, BOOT_MEM_RAM); + } + diff --git a/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch b/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch new file mode 100644 index 0000000000..e54e3de409 --- /dev/null +++ b/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch @@ -0,0 +1,17 @@ +--- a/arch/mips/bcm47xx/prom.c ++++ b/arch/mips/bcm47xx/prom.c +@@ -141,6 +141,14 @@ static __init void prom_init_mem(void) + break; + } + ++ /* Ignoring the last page when ddr size is 128M. Cached ++ * accesses to last page is causing the processor to prefetch ++ * using address above 128M stepping out of the ddr address ++ * space. ++ */ ++ if (mem == 0x8000000) ++ mem -= 0x1000; ++ + add_memory_region(0, mem, BOOT_MEM_RAM); + } + diff --git a/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch b/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch new file mode 100644 index 0000000000..e54e3de409 --- /dev/null +++ b/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch @@ -0,0 +1,17 @@ +--- a/arch/mips/bcm47xx/prom.c ++++ b/arch/mips/bcm47xx/prom.c +@@ -141,6 +141,14 @@ static __init void prom_init_mem(void) + break; + } + ++ /* Ignoring the last page when ddr size is 128M. Cached ++ * accesses to last page is causing the processor to prefetch ++ * using address above 128M stepping out of the ddr address ++ * space. ++ */ ++ if (mem == 0x8000000) ++ mem -= 0x1000; ++ + add_memory_region(0, mem, BOOT_MEM_RAM); + } + |