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path: root/target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch
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Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch')
-rw-r--r--target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch b/target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch
new file mode 100644
index 0000000000..1ceccb5c60
--- /dev/null
+++ b/target/linux/brcm47xx/patches-2.6.33/930-bcm47xx-pci-iomem.patch
@@ -0,0 +1,53 @@
+Index: linux-2.6.33/drivers/ssb/driver_pcicore.c
+===================================================================
+--- linux-2.6.33.orig/drivers/ssb/driver_pcicore.c 2010-03-15 14:52:55.000000000 +0100
++++ linux-2.6.33/drivers/ssb/driver_pcicore.c 2010-03-15 15:57:38.000000000 +0100
+@@ -246,20 +246,12 @@
+ .pci_ops = &ssb_pcicore_pciops,
+ .io_resource = &ssb_pcicore_io_resource,
+ .mem_resource = &ssb_pcicore_mem_resource,
+- .mem_offset = 0x24000000,
+ };
+
+-static u32 ssb_pcicore_pcibus_iobase = 0x100;
+-static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
+-
+ /* This function is called when doing a pci_enable_device().
+ * We must first check if the device is a device on the PCI-core bridge. */
+ int ssb_pcicore_plat_dev_init(struct pci_dev *d)
+ {
+- struct resource *res;
+- int pos, size;
+- u32 *base;
+-
+ if (d->bus->ops != &ssb_pcicore_pciops) {
+ /* This is not a device on the PCI-core bridge. */
+ return -ENODEV;
+@@ -268,27 +260,6 @@
+ ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
+ pci_name(d));
+
+- /* Fix up resource bases */
+- for (pos = 0; pos < 6; pos++) {
+- res = &d->resource[pos];
+- if (res->flags & IORESOURCE_IO)
+- base = &ssb_pcicore_pcibus_iobase;
+- else
+- base = &ssb_pcicore_pcibus_membase;
+- res->flags |= IORESOURCE_PCI_FIXED;
+- if (res->end) {
+- size = res->end - res->start + 1;
+- if (*base & (size - 1))
+- *base = (*base + size) & ~(size - 1);
+- res->start = *base;
+- res->end = res->start + size - 1;
+- *base += size;
+- pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
+- }
+- /* Fix up PCI bridge BAR0 only */
+- if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
+- break;
+- }
+ /* Fix up interrupt lines */
+ d->irq = ssb_mips_irq(extpci_core->dev) + 2;
+ pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);