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Diffstat (limited to 'target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch')
-rw-r--r--target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch35
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch b/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch
new file mode 100644
index 0000000000..ed082abaa5
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch
@@ -0,0 +1,35 @@
+From 5209e1b8f78fd1184f25cf19cf0daa58f4ad6599 Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+Date: Thu, 1 Dec 2016 22:00:20 +0100
+Subject: [PATCH] clk: bcm: Allow rate change propagation to PLLH_AUX on VEC
+ clock
+
+The VEC clock requires needs to be set at exactly 108MHz. Allow rate
+change propagation on PLLH_AUX to match this requirement wihtout
+impacting other IPs (PLLH is currently only used by the HDMI encoder,
+which cannot be enabled when the VEC encoder is enabled).
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+(cherry picked from commit d86d46af84855403c00018be1c3e7bc190f2a6cd)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1870,7 +1870,12 @@ static const struct bcm2835_clk_desc clk
+ .ctl_reg = CM_VECCTL,
+ .div_reg = CM_VECDIV,
+ .int_bits = 4,
+- .frac_bits = 0),
++ .frac_bits = 0,
++ /*
++ * Allow rate change propagation only on PLLH_AUX which is
++ * assigned index 7 in the parent array.
++ */
++ .set_rate_parent = BIT(7)),
+
+ /* dsi clocks */
+ [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(