diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0347-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch')
-rw-r--r-- | target/linux/brcm2708/patches-4.4/0347-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0347-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/brcm2708/patches-4.4/0347-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch new file mode 100644 index 0000000000..16e753eee8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.4/0347-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -0,0 +1,55 @@ +From 9a5319c6915364018e9422b6cef7e63a011b8b57 Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Mon, 9 May 2016 17:28:18 -0700 +Subject: [PATCH 347/423] clk: bcm2835: Mark GPIO clocks enabled at boot as + critical. + +These divide off of PLLD_PER and are used for the ethernet and wifi +PHYs source PLLs. Neither of them is currently represented by a phy +device that would grab the clock for us. + +This keeps other drivers from killing the networking PHYs when they +disable their own clocks and trigger PLLD_PER's refcount going to 0. + +v2: Skip marking as critical if they aren't on at boot. + +Signed-off-by: Eric Anholt <eric@anholt.net> +--- + drivers/clk/bcm/clk-bcm2835.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1246,6 +1246,15 @@ static struct clk *bcm2835_register_cloc + init.name = data->name; + init.flags = data->flags | CLK_IGNORE_UNUSED; + ++ /* ++ * Some GPIO clocks for ethernet/wifi PLLs are marked as ++ * critical (since some platforms use them), but if the ++ * firmware didn't have them turned on then they clearly ++ * aren't actually critical. ++ */ ++ if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0) ++ init.flags &= ~CLK_IS_CRITICAL; ++ + if (data->is_vpu_clock) { + init.ops = &bcm2835_vpu_clock_clk_ops; + } else { +@@ -1720,13 +1729,15 @@ static const struct bcm2835_clk_desc clk + .div_reg = CM_GP1DIV, + .int_bits = 12, + .frac_bits = 12, ++ .flags = CLK_IS_CRITICAL, + .is_mash_clock = true), + [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK( + .name = "gp2", + .ctl_reg = CM_GP2CTL, + .div_reg = CM_GP2DIV, + .int_bits = 12, +- .frac_bits = 12), ++ .frac_bits = 12, ++ .flags = CLK_IS_CRITICAL), + + /* HDMI state machine */ + [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK( |