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-rw-r--r--target/linux/brcm2708/patches-4.1/0006-bcm2708-framebuffer-driver.patch3432
1 files changed, 0 insertions, 3432 deletions
diff --git a/target/linux/brcm2708/patches-4.1/0006-bcm2708-framebuffer-driver.patch b/target/linux/brcm2708/patches-4.1/0006-bcm2708-framebuffer-driver.patch
deleted file mode 100644
index 69a31d667d..0000000000
--- a/target/linux/brcm2708/patches-4.1/0006-bcm2708-framebuffer-driver.patch
+++ /dev/null
@@ -1,3432 +0,0 @@
-From d82c8352af8dc0331fb66d89a299cb1b3d4b5c98 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Wed, 17 Jun 2015 17:06:34 +0100
-Subject: [PATCH 006/222] bcm2708 framebuffer driver
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: popcornmix <popcornmix@gmail.com>
-
-bcm2708_fb : Implement blanking support using the mailbox property interface
-
-bcm2708_fb: Add pan and vsync controls
-
-bcm2708_fb: DMA acceleration for fb_copyarea
-
-Based on http://www.raspberrypi.org/phpBB3/viewtopic.php?p=62425#p62425
-Also used Simon's dmaer_master module as a reference for tweaking DMA
-settings for better performance.
-
-For now busylooping only. IRQ support might be added later.
-With non-overclocked Raspberry Pi, the performance is ~360 MB/s
-for simple copy or ~260 MB/s for two-pass copy (used when dragging
-windows to the right).
-
-In the case of using DMA channel 0, the performance improves
-to ~440 MB/s.
-
-For comparison, VFP optimized CPU copy can only do ~114 MB/s in
-the same conditions (hindered by reading uncached source buffer).
-
-Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
-
-bcm2708_fb: report number of dma copies
-
-Add a counter (exported via debugfs) reporting the
-number of dma copies that the framebuffer driver
-has done, in order to help evaluate different
-optimization strategies.
-
-Signed-off-by: Luke Diamand <luked@broadcom.com>
-
-bcm2708_fb: use IRQ for DMA copies
-
-The copyarea ioctl() uses DMA to speed things along. This
-was busy-waiting for completion. This change supports using
-an interrupt instead for larger transfers. For small
-transfers, busy-waiting is still likely to be faster.
-
-Signed-off-by: Luke Diamand <luke@diamand.org>
-
-bcm2708: Make ioctl logging quieter
-
-video: fbdev: bcm2708_fb: Don't panic on error
-
-No need to panic the kernel if the video driver fails.
-Just print a message and return an error.
-
-Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
-
-fbdev: bcm2708_fb: Add ARCH_BCM2835 support
-
-Add Device Tree support.
-Pass the device to dma_alloc_coherent() in order to get the
-correct bus address on ARCH_BCM2835.
-Use the new DMA legacy API header file.
-Including <mach/platform.h> is not necessary.
-
-Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
-
-BCM270x_DT: Add bcm2708-fb device
-
-Add bcm2708-fb to Device Tree and don't add the
-platform device when booting in DT mode.
-
-Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
----
- drivers/video/fbdev/Kconfig | 14 +
- drivers/video/fbdev/Makefile | 1 +
- drivers/video/fbdev/bcm2708_fb.c | 824 ++++++++++
- drivers/video/logo/logo_linux_clut224.ppm | 2483 ++++++++++-------------------
- 4 files changed, 1720 insertions(+), 1602 deletions(-)
- create mode 100644 drivers/video/fbdev/bcm2708_fb.c
-
---- a/drivers/video/fbdev/Kconfig
-+++ b/drivers/video/fbdev/Kconfig
-@@ -224,6 +224,20 @@ config FB_TILEBLITTING
- comment "Frame buffer hardware drivers"
- depends on FB
-
-+config FB_BCM2708
-+ tristate "BCM2708 framebuffer support"
-+ depends on FB && ARM && BCM2708_MBOX
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ This framebuffer device driver is for the BCM2708 framebuffer.
-+
-+ If you want to compile this as a module (=code which can be
-+ inserted into and removed from the running kernel), say M
-+ here and read <file:Documentation/kbuild/modules.txt>. The module
-+ will be called bcm2708_fb.
-+
- config FB_GRVGA
- tristate "Aeroflex Gaisler framebuffer support"
- depends on FB && SPARC
---- a/drivers/video/fbdev/Makefile
-+++ b/drivers/video/fbdev/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_FB_MACMODES) += macmod
- obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
-
- # Hardware specific drivers go first
-+obj-$(CONFIG_FB_BCM2708) += bcm2708_fb.o
- obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
- obj-$(CONFIG_FB_ARC) += arcfb.o
- obj-$(CONFIG_FB_CLPS711X) += clps711x-fb.o
---- /dev/null
-+++ b/drivers/video/fbdev/bcm2708_fb.c
-@@ -0,0 +1,824 @@
-+/*
-+ * linux/drivers/video/bcm2708_fb.c
-+ *
-+ * Copyright (C) 2010 Broadcom
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file COPYING in the main directory of this archive
-+ * for more details.
-+ *
-+ * Broadcom simple framebuffer driver
-+ *
-+ * This file is derived from cirrusfb.c
-+ * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
-+ *
-+ */
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <linux/string.h>
-+#include <linux/slab.h>
-+#include <linux/mm.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/ioport.h>
-+#include <linux/list.h>
-+#include <linux/platform_data/dma-bcm2708.h>
-+#include <linux/platform_data/mailbox-bcm2708.h>
-+#include <linux/platform_device.h>
-+#include <linux/clk.h>
-+#include <linux/printk.h>
-+#include <linux/console.h>
-+#include <linux/debugfs.h>
-+#include <asm/sizes.h>
-+#include <linux/io.h>
-+#include <linux/dma-mapping.h>
-+
-+//#define BCM2708_FB_DEBUG
-+#define MODULE_NAME "bcm2708_fb"
-+
-+#ifdef BCM2708_FB_DEBUG
-+#define print_debug(fmt,...) pr_debug("%s:%s:%d: "fmt, MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__)
-+#else
-+#define print_debug(fmt,...)
-+#endif
-+
-+/* This is limited to 16 characters when displayed by X startup */
-+static const char *bcm2708_name = "BCM2708 FB";
-+
-+#define DRIVER_NAME "bcm2708_fb"
-+
-+static int fbwidth = 800; /* module parameter */
-+static int fbheight = 480; /* module parameter */
-+static int fbdepth = 16; /* module parameter */
-+static int fbswap = 0; /* module parameter */
-+
-+static u32 dma_busy_wait_threshold = 1<<15;
-+module_param(dma_busy_wait_threshold, int, 0644);
-+MODULE_PARM_DESC(dma_busy_wait_threshold, "Busy-wait for DMA completion below this area");
-+
-+/* this data structure describes each frame buffer device we find */
-+
-+struct fbinfo_s {
-+ u32 xres, yres, xres_virtual, yres_virtual;
-+ u32 pitch, bpp;
-+ u32 xoffset, yoffset;
-+ u32 base;
-+ u32 screen_size;
-+ u16 cmap[256];
-+};
-+
-+struct bcm2708_fb_stats {
-+ struct debugfs_regset32 regset;
-+ u32 dma_copies;
-+ u32 dma_irqs;
-+};
-+
-+struct bcm2708_fb {
-+ struct fb_info fb;
-+ struct platform_device *dev;
-+ struct fbinfo_s *info;
-+ dma_addr_t dma;
-+ u32 cmap[16];
-+ int dma_chan;
-+ int dma_irq;
-+ void __iomem *dma_chan_base;
-+ void *cb_base; /* DMA control blocks */
-+ dma_addr_t cb_handle;
-+ struct dentry *debugfs_dir;
-+ wait_queue_head_t dma_waitq;
-+ struct bcm2708_fb_stats stats;
-+ unsigned long fb_bus_address;
-+};
-+
-+#define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb)
-+
-+static void bcm2708_fb_debugfs_deinit(struct bcm2708_fb *fb)
-+{
-+ debugfs_remove_recursive(fb->debugfs_dir);
-+ fb->debugfs_dir = NULL;
-+}
-+
-+static int bcm2708_fb_debugfs_init(struct bcm2708_fb *fb)
-+{
-+ static struct debugfs_reg32 stats_registers[] = {
-+ {
-+ "dma_copies",
-+ offsetof(struct bcm2708_fb_stats, dma_copies)
-+ },
-+ {
-+ "dma_irqs",
-+ offsetof(struct bcm2708_fb_stats, dma_irqs)
-+ },
-+ };
-+
-+ fb->debugfs_dir = debugfs_create_dir(DRIVER_NAME, NULL);
-+ if (!fb->debugfs_dir) {
-+ pr_warn("%s: could not create debugfs entry\n",
-+ __func__);
-+ return -EFAULT;
-+ }
-+
-+ fb->stats.regset.regs = stats_registers;
-+ fb->stats.regset.nregs = ARRAY_SIZE(stats_registers);
-+ fb->stats.regset.base = &fb->stats;
-+
-+ if (!debugfs_create_regset32(
-+ "stats", 0444, fb->debugfs_dir, &fb->stats.regset)) {
-+ pr_warn("%s: could not create statistics registers\n",
-+ __func__);
-+ goto fail;
-+ }
-+ return 0;
-+
-+fail:
-+ bcm2708_fb_debugfs_deinit(fb);
-+ return -EFAULT;
-+}
-+
-+static int bcm2708_fb_set_bitfields(struct fb_var_screeninfo *var)
-+{
-+ int ret = 0;
-+
-+ memset(&var->transp, 0, sizeof(var->transp));
-+
-+ var->red.msb_right = 0;
-+ var->green.msb_right = 0;
-+ var->blue.msb_right = 0;
-+
-+ switch (var->bits_per_pixel) {
-+ case 1:
-+ case 2:
-+ case 4:
-+ case 8:
-+ var->red.length = var->bits_per_pixel;
-+ var->red.offset = 0;
-+ var->green.length = var->bits_per_pixel;
-+ var->green.offset = 0;
-+ var->blue.length = var->bits_per_pixel;
-+ var->blue.offset = 0;
-+ break;
-+ case 16:
-+ var->red.length = 5;
-+ var->blue.length = 5;
-+ /*
-+ * Green length can be 5 or 6 depending whether
-+ * we're operating in RGB555 or RGB565 mode.
-+ */
-+ if (var->green.length != 5 && var->green.length != 6)
-+ var->green.length = 6;
-+ break;
-+ case 24:
-+ var->red.length = 8;
-+ var->blue.length = 8;
-+ var->green.length = 8;
-+ break;
-+ case 32:
-+ var->red.length = 8;
-+ var->green.length = 8;
-+ var->blue.length = 8;
-+ var->transp.length = 8;
-+ break;
-+ default:
-+ ret = -EINVAL;
-+ break;
-+ }
-+
-+ /*
-+ * >= 16bpp displays have separate colour component bitfields
-+ * encoded in the pixel data. Calculate their position from
-+ * the bitfield length defined above.
-+ */
-+ if (ret == 0 && var->bits_per_pixel >= 24 && fbswap) {
-+ var->blue.offset = 0;
-+ var->green.offset = var->blue.offset + var->blue.length;
-+ var->red.offset = var->green.offset + var->green.length;
-+ var->transp.offset = var->red.offset + var->red.length;
-+ } else if (ret == 0 && var->bits_per_pixel >= 24) {
-+ var->red.offset = 0;
-+ var->green.offset = var->red.offset + var->red.length;
-+ var->blue.offset = var->green.offset + var->green.length;
-+ var->transp.offset = var->blue.offset + var->blue.length;
-+ } else if (ret == 0 && var->bits_per_pixel >= 16) {
-+ var->blue.offset = 0;
-+ var->green.offset = var->blue.offset + var->blue.length;
-+ var->red.offset = var->green.offset + var->green.length;
-+ var->transp.offset = var->red.offset + var->red.length;
-+ }
-+
-+ return ret;
-+}
-+
-+static int bcm2708_fb_check_var(struct fb_var_screeninfo *var,
-+ struct fb_info *info)
-+{
-+ /* info input, var output */
-+ int yres;
-+
-+ /* info input, var output */
-+ print_debug("bcm2708_fb_check_var info(%p) %dx%d (%dx%d), %d, %d\n", info,
-+ info->var.xres, info->var.yres, info->var.xres_virtual,
-+ info->var.yres_virtual, (int)info->screen_size,
-+ info->var.bits_per_pixel);
-+ print_debug("bcm2708_fb_check_var var(%p) %dx%d (%dx%d), %d\n", var,
-+ var->xres, var->yres, var->xres_virtual, var->yres_virtual,
-+ var->bits_per_pixel);
-+
-+ if (!var->bits_per_pixel)
-+ var->bits_per_pixel = 16;
-+
-+ if (bcm2708_fb_set_bitfields(var) != 0) {
-+ pr_err("bcm2708_fb_check_var: invalid bits_per_pixel %d\n",
-+ var->bits_per_pixel);
-+ return -EINVAL;
-+ }
-+
-+
-+ if (var->xres_virtual < var->xres)
-+ var->xres_virtual = var->xres;
-+ /* use highest possible virtual resolution */
-+ if (var->yres_virtual == -1) {
-+ var->yres_virtual = 480;
-+
-+ pr_err
-+ ("bcm2708_fb_check_var: virtual resolution set to maximum of %dx%d\n",
-+ var->xres_virtual, var->yres_virtual);
-+ }
-+ if (var->yres_virtual < var->yres)
-+ var->yres_virtual = var->yres;
-+
-+ if (var->xoffset < 0)
-+ var->xoffset = 0;
-+ if (var->yoffset < 0)
-+ var->yoffset = 0;
-+
-+ /* truncate xoffset and yoffset to maximum if too high */
-+ if (var->xoffset > var->xres_virtual - var->xres)
-+ var->xoffset = var->xres_virtual - var->xres - 1;
-+ if (var->yoffset > var->yres_virtual - var->yres)
-+ var->yoffset = var->yres_virtual - var->yres - 1;
-+
-+ yres = var->yres;
-+ if (var->vmode & FB_VMODE_DOUBLE)
-+ yres *= 2;
-+ else if (var->vmode & FB_VMODE_INTERLACED)
-+ yres = (yres + 1) / 2;
-+
-+ return 0;
-+}
-+
-+static int bcm2708_fb_set_par(struct fb_info *info)
-+{
-+ uint32_t val = 0;
-+ struct bcm2708_fb *fb = to_bcm2708(info);
-+ volatile struct fbinfo_s *fbinfo = fb->info;
-+ fbinfo->xres = info->var.xres;
-+ fbinfo->yres = info->var.yres;
-+ fbinfo->xres_virtual = info->var.xres_virtual;
-+ fbinfo->yres_virtual = info->var.yres_virtual;
-+ fbinfo->bpp = info->var.bits_per_pixel;
-+ fbinfo->xoffset = info->var.xoffset;
-+ fbinfo->yoffset = info->var.yoffset;
-+ fbinfo->base = 0; /* filled in by VC */
-+ fbinfo->pitch = 0; /* filled in by VC */
-+
-+ print_debug("bcm2708_fb_set_par info(%p) %dx%d (%dx%d), %d, %d\n", info,
-+ info->var.xres, info->var.yres, info->var.xres_virtual,
-+ info->var.yres_virtual, (int)info->screen_size,
-+ info->var.bits_per_pixel);
-+
-+ /* ensure last write to fbinfo is visible to GPU */
-+ wmb();
-+
-+ /* inform vc about new framebuffer */
-+ bcm_mailbox_write(MBOX_CHAN_FB, fb->dma);
-+
-+ /* TODO: replace fb driver with vchiq version */
-+ /* wait for response */
-+ bcm_mailbox_read(MBOX_CHAN_FB, &val);
-+
-+ /* ensure GPU writes are visible to us */
-+ rmb();
-+
-+ if (val == 0) {
-+ fb->fb.fix.line_length = fbinfo->pitch;
-+
-+ if (info->var.bits_per_pixel <= 8)
-+ fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
-+ else
-+ fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
-+
-+ fb->fb_bus_address = fbinfo->base;
-+ fbinfo->base &= ~0xc0000000;
-+ fb->fb.fix.smem_start = fbinfo->base;
-+ fb->fb.fix.smem_len = fbinfo->pitch * fbinfo->yres_virtual;
-+ fb->fb.screen_size = fbinfo->screen_size;
-+ if (fb->fb.screen_base)
-+ iounmap(fb->fb.screen_base);
-+ fb->fb.screen_base =
-+ (void *)ioremap_wc(fbinfo->base, fb->fb.screen_size);
-+ if (!fb->fb.screen_base) {
-+ /* the console may currently be locked */
-+ console_trylock();
-+ console_unlock();
-+ pr_err("bcm2708_fb_set_par: Failed to set screen_base\n");
-+ return -EIO;
-+ }
-+ }
-+ print_debug
-+ ("BCM2708FB: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d success=%d\n",
-+ (void *)fb->fb.screen_base, (void *)fb->fb_bus_address,
-+ fbinfo->xres, fbinfo->yres, fbinfo->bpp,
-+ fbinfo->pitch, (int)fb->fb.screen_size, val);
-+
-+ return val;
-+}
-+
-+static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
-+{
-+ unsigned int mask = (1 << bf->length) - 1;
-+
-+ return (val >> (16 - bf->length) & mask) << bf->offset;
-+}
-+
-+
-+static int bcm2708_fb_setcolreg(unsigned int regno, unsigned int red,
-+ unsigned int green, unsigned int blue,
-+ unsigned int transp, struct fb_info *info)
-+{
-+ struct bcm2708_fb *fb = to_bcm2708(info);
-+
-+ /*print_debug("BCM2708FB: setcolreg %d:(%02x,%02x,%02x,%02x) %x\n", regno, red, green, blue, transp, fb->fb.fix.visual);*/
-+ if (fb->fb.var.bits_per_pixel <= 8) {
-+ if (regno < 256) {
-+ /* blue [0:4], green [5:10], red [11:15] */
-+ fb->info->cmap[regno] = ((red >> (16-5)) & 0x1f) << 11 |
-+ ((green >> (16-6)) & 0x3f) << 5 |
-+ ((blue >> (16-5)) & 0x1f) << 0;
-+ }
-+ /* Hack: we need to tell GPU the palette has changed, but currently bcm2708_fb_set_par takes noticable time when called for every (256) colour */
-+ /* So just call it for what looks like the last colour in a list for now. */
-+ if (regno == 15 || regno == 255)
-+ bcm2708_fb_set_par(info);
-+ } else if (regno < 16) {
-+ fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
-+ convert_bitfield(blue, &fb->fb.var.blue) |
-+ convert_bitfield(green, &fb->fb.var.green) |
-+ convert_bitfield(red, &fb->fb.var.red);
-+ }
-+ return regno > 255;
-+}
-+
-+static int bcm2708_fb_blank(int blank_mode, struct fb_info *info)
-+{
-+ s32 result = -1;
-+ u32 p[7];
-+ if ( (blank_mode == FB_BLANK_NORMAL) ||
-+ (blank_mode == FB_BLANK_UNBLANK)) {
-+
-+ p[0] = 28; // size = sizeof u32 * length of p
-+ p[1] = VCMSG_PROCESS_REQUEST; // process request
-+ p[2] = VCMSG_SET_BLANK_SCREEN; // (the tag id)
-+ p[3] = 4; // (size of the response buffer)
-+ p[4] = 4; // (size of the request data)
-+ p[5] = blank_mode;
-+ p[6] = VCMSG_PROPERTY_END; // end tag
-+
-+ bcm_mailbox_property(&p, p[0]);
-+
-+ if ( p[1] == VCMSG_REQUEST_SUCCESSFUL )
-+ result = 0;
-+ else
-+ pr_err("bcm2708_fb_blank(%d) returns=%d p[1]=0x%x\n", blank_mode, p[5], p[1]);
-+ }
-+ return result;
-+}
-+
-+static int bcm2708_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
-+{
-+ s32 result = -1;
-+ info->var.xoffset = var->xoffset;
-+ info->var.yoffset = var->yoffset;
-+ result = bcm2708_fb_set_par(info);
-+ if (result != 0)
-+ pr_err("bcm2708_fb_pan_display(%d,%d) returns=%d\n", var->xoffset, var->yoffset, result);
-+ return result;
-+}
-+
-+static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
-+{
-+ s32 result = -1;
-+ u32 p[7];
-+ if (cmd == FBIO_WAITFORVSYNC) {
-+ p[0] = 28; // size = sizeof u32 * length of p
-+ p[1] = VCMSG_PROCESS_REQUEST; // process request
-+ p[2] = VCMSG_SET_VSYNC; // (the tag id)
-+ p[3] = 4; // (size of the response buffer)
-+ p[4] = 4; // (size of the request data)
-+ p[5] = 0; // dummy
-+ p[6] = VCMSG_PROPERTY_END; // end tag
-+
-+ bcm_mailbox_property(&p, p[0]);
-+
-+ if ( p[1] == VCMSG_REQUEST_SUCCESSFUL )
-+ result = 0;
-+ else
-+ pr_err("bcm2708_fb_ioctl %x,%lx returns=%d p[1]=0x%x\n", cmd, arg, p[5], p[1]);
-+ }
-+ return result;
-+}
-+static void bcm2708_fb_fillrect(struct fb_info *info,
-+ const struct fb_fillrect *rect)
-+{
-+ /* (is called) print_debug("bcm2708_fb_fillrect\n"); */
-+ cfb_fillrect(info, rect);
-+}
-+
-+/* A helper function for configuring dma control block */
-+static void set_dma_cb(struct bcm2708_dma_cb *cb,
-+ int burst_size,
-+ dma_addr_t dst,
-+ int dst_stride,
-+ dma_addr_t src,
-+ int src_stride,
-+ int w,
-+ int h)
-+{
-+ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
-+ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
-+ BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE;
-+ cb->dst = dst;
-+ cb->src = src;
-+ /*
-+ * This is not really obvious from the DMA documentation,
-+ * but the top 16 bits must be programmmed to "height -1"
-+ * and not "height" in 2D mode.
-+ */
-+ cb->length = ((h - 1) << 16) | w;
-+ cb->stride = ((dst_stride - w) << 16) | (u16)(src_stride - w);
-+ cb->pad[0] = 0;
-+ cb->pad[1] = 0;
-+}
-+
-+static void bcm2708_fb_copyarea(struct fb_info *info,
-+ const struct fb_copyarea *region)
-+{
-+ struct bcm2708_fb *fb = to_bcm2708(info);
-+ struct bcm2708_dma_cb *cb = fb->cb_base;
-+ int bytes_per_pixel = (info->var.bits_per_pixel + 7) >> 3;
-+ /* Channel 0 supports larger bursts and is a bit faster */
-+ int burst_size = (fb->dma_chan == 0) ? 8 : 2;
-+ int pixels = region->width * region->height;
-+
-+ /* Fallback to cfb_copyarea() if we don't like something */
-+ if (in_atomic() ||
-+ bytes_per_pixel > 4 ||
-+ info->var.xres * info->var.yres > 1920 * 1200 ||
-+ region->width <= 0 || region->width > info->var.xres ||
-+ region->height <= 0 || region->height > info->var.yres ||
-+ region->sx < 0 || region->sx >= info->var.xres ||
-+ region->sy < 0 || region->sy >= info->var.yres ||
-+ region->dx < 0 || region->dx >= info->var.xres ||
-+ region->dy < 0 || region->dy >= info->var.yres ||
-+ region->sx + region->width > info->var.xres ||
-+ region->dx + region->width > info->var.xres ||
-+ region->sy + region->height > info->var.yres ||
-+ region->dy + region->height > info->var.yres) {
-+ cfb_copyarea(info, region);
-+ return;
-+ }
-+
-+ if (region->dy == region->sy && region->dx > region->sx) {
-+ /*
-+ * A difficult case of overlapped copy. Because DMA can't
-+ * copy individual scanlines in backwards direction, we need
-+ * two-pass processing. We do it by programming a chain of dma
-+ * control blocks in the first 16K part of the buffer and use
-+ * the remaining 48K as the intermediate temporary scratch
-+ * buffer. The buffer size is sufficient to handle up to
-+ * 1920x1200 resolution at 32bpp pixel depth.
-+ */
-+ int y;
-+ dma_addr_t control_block_pa = fb->cb_handle;
-+ dma_addr_t scratchbuf = fb->cb_handle + 16 * 1024;
-+ int scanline_size = bytes_per_pixel * region->width;
-+ int scanlines_per_cb = (64 * 1024 - 16 * 1024) / scanline_size;
-+
-+ for (y = 0; y < region->height; y += scanlines_per_cb) {
-+ dma_addr_t src =
-+ fb->fb_bus_address +
-+ bytes_per_pixel * region->sx +
-+ (region->sy + y) * fb->fb.fix.line_length;
-+ dma_addr_t dst =
-+ fb->fb_bus_address +
-+ bytes_per_pixel * region->dx +
-+ (region->dy + y) * fb->fb.fix.line_length;
-+
-+ if (region->height - y < scanlines_per_cb)
-+ scanlines_per_cb = region->height - y;
-+
-+ set_dma_cb(cb, burst_size, scratchbuf, scanline_size,
-+ src, fb->fb.fix.line_length,
-+ scanline_size, scanlines_per_cb);
-+ control_block_pa += sizeof(struct bcm2708_dma_cb);
-+ cb->next = control_block_pa;
-+ cb++;
-+
-+ set_dma_cb(cb, burst_size, dst, fb->fb.fix.line_length,
-+ scratchbuf, scanline_size,
-+ scanline_size, scanlines_per_cb);
-+ control_block_pa += sizeof(struct bcm2708_dma_cb);
-+ cb->next = control_block_pa;
-+ cb++;
-+ }
-+ /* move the pointer back to the last dma control block */
-+ cb--;
-+ } else {
-+ /* A single dma control block is enough. */
-+ int sy, dy, stride;
-+ if (region->dy <= region->sy) {
-+ /* processing from top to bottom */
-+ dy = region->dy;
-+ sy = region->sy;
-+ stride = fb->fb.fix.line_length;
-+ } else {
-+ /* processing from bottom to top */
-+ dy = region->dy + region->height - 1;
-+ sy = region->sy + region->height - 1;
-+ stride = -fb->fb.fix.line_length;
-+ }
-+ set_dma_cb(cb, burst_size,
-+ fb->fb_bus_address + dy * fb->fb.fix.line_length +
-+ bytes_per_pixel * region->dx,
-+ stride,
-+ fb->fb_bus_address + sy * fb->fb.fix.line_length +
-+ bytes_per_pixel * region->sx,
-+ stride,
-+ region->width * bytes_per_pixel,
-+ region->height);
-+ }
-+
-+ /* end of dma control blocks chain */
-+ cb->next = 0;
-+
-+
-+ if (pixels < dma_busy_wait_threshold) {
-+ bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
-+ bcm_dma_wait_idle(fb->dma_chan_base);
-+ } else {
-+ void __iomem *dma_chan = fb->dma_chan_base;
-+ cb->info |= BCM2708_DMA_INT_EN;
-+ bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
-+ while (bcm_dma_is_busy(dma_chan)) {
-+ wait_event_interruptible(
-+ fb->dma_waitq,
-+ !bcm_dma_is_busy(dma_chan));
-+ }
-+ fb->stats.dma_irqs++;
-+ }
-+ fb->stats.dma_copies++;
-+}
-+
-+static void bcm2708_fb_imageblit(struct fb_info *info,
-+ const struct fb_image *image)
-+{
-+ /* (is called) print_debug("bcm2708_fb_imageblit\n"); */
-+ cfb_imageblit(info, image);
-+}
-+
-+static irqreturn_t bcm2708_fb_dma_irq(int irq, void *cxt)
-+{
-+ struct bcm2708_fb *fb = cxt;
-+
-+ /* FIXME: should read status register to check if this is
-+ * actually interrupting us or not, in case this interrupt
-+ * ever becomes shared amongst several DMA channels
-+ *
-+ * readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_IRQ;
-+ */
-+
-+ /* acknowledge the interrupt */
-+ writel(BCM2708_DMA_INT, fb->dma_chan_base + BCM2708_DMA_CS);
-+
-+ wake_up(&fb->dma_waitq);
-+ return IRQ_HANDLED;
-+}
-+
-+static struct fb_ops bcm2708_fb_ops = {
-+ .owner = THIS_MODULE,
-+ .fb_check_var = bcm2708_fb_check_var,
-+ .fb_set_par = bcm2708_fb_set_par,
-+ .fb_setcolreg = bcm2708_fb_setcolreg,
-+ .fb_blank = bcm2708_fb_blank,
-+ .fb_fillrect = bcm2708_fb_fillrect,
-+ .fb_copyarea = bcm2708_fb_copyarea,
-+ .fb_imageblit = bcm2708_fb_imageblit,
-+ .fb_pan_display = bcm2708_fb_pan_display,
-+ .fb_ioctl = bcm2708_ioctl,
-+};
-+
-+static int bcm2708_fb_register(struct bcm2708_fb *fb)
-+{
-+ int ret;
-+ dma_addr_t dma;
-+ void *mem;
-+
-+ mem =
-+ dma_alloc_coherent(&fb->dev->dev, PAGE_ALIGN(sizeof(*fb->info)), &dma,
-+ GFP_KERNEL);
-+
-+ if (NULL == mem) {
-+ pr_err(": unable to allocate fbinfo buffer\n");
-+ ret = -ENOMEM;
-+ } else {
-+ fb->info = (struct fbinfo_s *)mem;
-+ fb->dma = dma;
-+ }
-+ fb->fb.fbops = &bcm2708_fb_ops;
-+ fb->fb.flags = FBINFO_FLAG_DEFAULT | FBINFO_HWACCEL_COPYAREA;
-+ fb->fb.pseudo_palette = fb->cmap;
-+
-+ strncpy(fb->fb.fix.id, bcm2708_name, sizeof(fb->fb.fix.id));
-+ fb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
-+ fb->fb.fix.type_aux = 0;
-+ fb->fb.fix.xpanstep = 1;
-+ fb->fb.fix.ypanstep = 1;
-+ fb->fb.fix.ywrapstep = 0;
-+ fb->fb.fix.accel = FB_ACCEL_NONE;
-+
-+ fb->fb.var.xres = fbwidth;
-+ fb->fb.var.yres = fbheight;
-+ fb->fb.var.xres_virtual = fbwidth;
-+ fb->fb.var.yres_virtual = fbheight;
-+ fb->fb.var.bits_per_pixel = fbdepth;
-+ fb->fb.var.vmode = FB_VMODE_NONINTERLACED;
-+ fb->fb.var.activate = FB_ACTIVATE_NOW;
-+ fb->fb.var.nonstd = 0;
-+ fb->fb.var.height = -1; /* height of picture in mm */
-+ fb->fb.var.width = -1; /* width of picture in mm */
-+ fb->fb.var.accel_flags = 0;
-+
-+ fb->fb.monspecs.hfmin = 0;
-+ fb->fb.monspecs.hfmax = 100000;
-+ fb->fb.monspecs.vfmin = 0;
-+ fb->fb.monspecs.vfmax = 400;
-+ fb->fb.monspecs.dclkmin = 1000000;
-+ fb->fb.monspecs.dclkmax = 100000000;
-+
-+ bcm2708_fb_set_bitfields(&fb->fb.var);
-+ init_waitqueue_head(&fb->dma_waitq);
-+
-+ /*
-+ * Allocate colourmap.
-+ */
-+
-+ fb_set_var(&fb->fb, &fb->fb.var);
-+ ret = bcm2708_fb_set_par(&fb->fb);
-+ if (ret)
-+ return ret;
-+
-+ print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n", fbwidth,
-+ fbheight, fbdepth, fbswap);
-+
-+ ret = register_framebuffer(&fb->fb);
-+ print_debug("BCM2708FB: register framebuffer (%d)\n", ret);
-+ if (ret == 0)
-+ goto out;
-+
-+ print_debug("BCM2708FB: cannot register framebuffer (%d)\n", ret);
-+out:
-+ return ret;
-+}
-+
-+static int bcm2708_fb_probe(struct platform_device *dev)
-+{
-+ struct bcm2708_fb *fb;
-+ int ret;
-+
-+ fb = kzalloc(sizeof(struct bcm2708_fb), GFP_KERNEL);
-+ if (!fb) {
-+ dev_err(&dev->dev,
-+ "could not allocate new bcm2708_fb struct\n");
-+ ret = -ENOMEM;
-+ goto free_region;
-+ }
-+
-+ bcm2708_fb_debugfs_init(fb);
-+
-+ fb->cb_base = dma_alloc_writecombine(&dev->dev, SZ_64K,
-+ &fb->cb_handle, GFP_KERNEL);
-+ if (!fb->cb_base) {
-+ dev_err(&dev->dev, "cannot allocate DMA CBs\n");
-+ ret = -ENOMEM;
-+ goto free_fb;
-+ }
-+
-+ pr_info("BCM2708FB: allocated DMA memory %08x\n",
-+ fb->cb_handle);
-+
-+ ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK,
-+ &fb->dma_chan_base, &fb->dma_irq);
-+ if (ret < 0) {
-+ dev_err(&dev->dev, "couldn't allocate a DMA channel\n");
-+ goto free_cb;
-+ }
-+ fb->dma_chan = ret;
-+
-+ ret = request_irq(fb->dma_irq, bcm2708_fb_dma_irq,
-+ 0, "bcm2708_fb dma", fb);
-+ if (ret) {
-+ pr_err("%s: failed to request DMA irq\n", __func__);
-+ goto free_dma_chan;
-+ }
-+
-+
-+ pr_info("BCM2708FB: allocated DMA channel %d @ %p\n",
-+ fb->dma_chan, fb->dma_chan_base);
-+
-+ fb->dev = dev;
-+
-+ ret = bcm2708_fb_register(fb);
-+ if (ret == 0) {
-+ platform_set_drvdata(dev, fb);
-+ goto out;
-+ }
-+
-+free_dma_chan:
-+ bcm_dma_chan_free(fb->dma_chan);
-+free_cb:
-+ dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle);
-+free_fb:
-+ kfree(fb);
-+free_region:
-+ dev_err(&dev->dev, "probe failed, err %d\n", ret);
-+out:
-+ return ret;
-+}
-+
-+static int bcm2708_fb_remove(struct platform_device *dev)
-+{
-+ struct bcm2708_fb *fb = platform_get_drvdata(dev);
-+
-+ platform_set_drvdata(dev, NULL);
-+
-+ if (fb->fb.screen_base)
-+ iounmap(fb->fb.screen_base);
-+ unregister_framebuffer(&fb->fb);
-+
-+ dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle);
-+ bcm_dma_chan_free(fb->dma_chan);
-+
-+ dma_free_coherent(NULL, PAGE_ALIGN(sizeof(*fb->info)), (void *)fb->info,
-+ fb->dma);
-+ bcm2708_fb_debugfs_deinit(fb);
-+
-+ free_irq(fb->dma_irq, fb);
-+
-+ kfree(fb);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm2708_fb_of_match_table[] = {
-+ { .compatible = "brcm,bcm2708-fb", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, bcm2708_fb_of_match_table);
-+
-+static struct platform_driver bcm2708_fb_driver = {
-+ .probe = bcm2708_fb_probe,
-+ .remove = bcm2708_fb_remove,
-+ .driver = {
-+ .name = DRIVER_NAME,
-+ .owner = THIS_MODULE,
-+ .of_match_table = bcm2708_fb_of_match_table,
-+ },
-+};
-+
-+static int __init bcm2708_fb_init(void)
-+{
-+ return platform_driver_register(&bcm2708_fb_driver);
-+}
-+
-+module_init(bcm2708_fb_init);
-+
-+static void __exit bcm2708_fb_exit(void)
-+{
-+ platform_driver_unregister(&bcm2708_fb_driver);
-+}
-+
-+module_exit(bcm2708_fb_exit);
-+
-+module_param(fbwidth, int, 0644);
-+module_param(fbheight, int, 0644);
-+module_param(fbdepth, int, 0644);
-+module_param(fbswap, int, 0644);
-+
-+MODULE_DESCRIPTION("BCM2708 framebuffer driver");
-+MODULE_LICENSE("GPL");
-+
-+MODULE_PARM_DESC(fbwidth, "Width of ARM Framebuffer");
-+MODULE_PARM_DESC(fbheight, "Height of ARM Framebuffer");
-+MODULE_PARM_DESC(fbdepth, "Bit depth of ARM Framebuffer");
-+MODULE_PARM_DESC(fbswap, "Swap order of red and blue in 24 and 32 bit modes");
---- a/drivers/video/logo/logo_linux_clut224.ppm
-+++ b/drivers/video/logo/logo_linux_clut224.ppm
-@@ -1,1604 +1,883 @@
- P3
--# Standard 224-color Linux logo
--80 80
-+63 80
- 255
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 6 6 6 6 6 6 10 10 10 10 10 10
-- 10 10 10 6 6 6 6 6 6 6 6 6
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 6 6 6 10 10 10 14 14 14
-- 22 22 22 26 26 26 30 30 30 34 34 34
-- 30 30 30 30 30 30 26 26 26 18 18 18
-- 14 14 14 10 10 10 6 6 6 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 1 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 6 6 6 14 14 14 26 26 26 42 42 42
-- 54 54 54 66 66 66 78 78 78 78 78 78
-- 78 78 78 74 74 74 66 66 66 54 54 54
-- 42 42 42 26 26 26 18 18 18 10 10 10
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 1 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 22 22 22 42 42 42 66 66 66 86 86 86
-- 66 66 66 38 38 38 38 38 38 22 22 22
-- 26 26 26 34 34 34 54 54 54 66 66 66
-- 86 86 86 70 70 70 46 46 46 26 26 26
-- 14 14 14 6 6 6 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 1 0 0 1 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 10 10 10 26 26 26
-- 50 50 50 82 82 82 58 58 58 6 6 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 6 6 6 54 54 54 86 86 86 66 66 66
-- 38 38 38 18 18 18 6 6 6 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 6 6 6 22 22 22 50 50 50
-- 78 78 78 34 34 34 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 6 6 6 70 70 70
-- 78 78 78 46 46 46 22 22 22 6 6 6
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 1 0 0 1 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 6 6 6 18 18 18 42 42 42 82 82 82
-- 26 26 26 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 14 14 14
-- 46 46 46 34 34 34 6 6 6 2 2 6
-- 42 42 42 78 78 78 42 42 42 18 18 18
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 1 0 0 0 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 10 10 10 30 30 30 66 66 66 58 58 58
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 26 26 26
-- 86 86 86 101 101 101 46 46 46 10 10 10
-- 2 2 6 58 58 58 70 70 70 34 34 34
-- 10 10 10 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 1 0 0 1 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 14 14 14 42 42 42 86 86 86 10 10 10
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 30 30 30
-- 94 94 94 94 94 94 58 58 58 26 26 26
-- 2 2 6 6 6 6 78 78 78 54 54 54
-- 22 22 22 6 6 6 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 22 22 22 62 62 62 62 62 62 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 26 26 26
-- 54 54 54 38 38 38 18 18 18 10 10 10
-- 2 2 6 2 2 6 34 34 34 82 82 82
-- 38 38 38 14 14 14 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 1 0 0 1 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 30 30 30 78 78 78 30 30 30 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 10 10 10
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-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 38 38 38 86 86 86 14 14 14 2 2 6
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-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
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-- 42 42 42 82 82 82 2 2 6 2 2 6
-- 2 2 6 6 6 6 10 10 10 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 6 6 6
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-- 46 46 46 86 86 86 2 2 6 2 2 6
-- 6 6 6 6 6 6 22 22 22 34 34 34
-- 6 6 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 18 18 18 34 34 34
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-- 46 46 46 86 86 86 2 2 6 2 2 6
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-- 2 2 6 2 2 6 2 2 6 2 2 6
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-- 46 46 46 86 86 86 2 2 6 14 14 14
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-- 46 46 46 86 86 86 2 2 6 54 54 54
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-- 46 46 46 82 82 82 2 2 6 106 106 106
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-- 42 42 42 86 86 86 6 6 6 116 116 116
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-- 2 2 6 2 2 6 2 2 6 2 2 6
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-- 38 38 38 90 90 90 14 14 14 58 58 58
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--253 253 253 253 253 253 253 253 253 253 253 253
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--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
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--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
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--246 246 246 250 250 250 250 250 250 238 238 238
--226 226 226 231 231 231 238 238 238 250 250 250
--250 250 250 250 250 250 246 246 246 231 231 231
--214 214 214 206 206 206 202 202 202 202 202 202
--198 198 198 202 202 202 182 182 182 18 18 18
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 62 62 62 66 66 66 30 30 30
-- 10 10 10 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 14 14 14 42 42 42 82 82 82 18 18 18
-- 2 2 6 2 2 6 2 2 6 10 10 10
-- 94 94 94 182 182 182 218 218 218 242 242 242
--250 250 250 253 253 253 253 253 253 250 250 250
--234 234 234 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 246 246 246
--238 238 238 226 226 226 210 210 210 202 202 202
--195 195 195 195 195 195 210 210 210 158 158 158
-- 6 6 6 14 14 14 50 50 50 14 14 14
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 6 6 6 86 86 86 46 46 46
-- 18 18 18 6 6 6 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 22 22 22 54 54 54 70 70 70 2 2 6
-- 2 2 6 10 10 10 2 2 6 22 22 22
--166 166 166 231 231 231 250 250 250 253 253 253
--253 253 253 253 253 253 253 253 253 250 250 250
--242 242 242 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 246 246 246
--231 231 231 206 206 206 198 198 198 226 226 226
-- 94 94 94 2 2 6 6 6 6 38 38 38
-- 30 30 30 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 62 62 62 66 66 66
-- 26 26 26 10 10 10 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 30 30 30 74 74 74 50 50 50 2 2 6
-- 26 26 26 26 26 26 2 2 6 106 106 106
--238 238 238 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 246 246 246 218 218 218 202 202 202
--210 210 210 14 14 14 2 2 6 2 2 6
-- 30 30 30 22 22 22 2 2 6 2 2 6
-- 2 2 6 2 2 6 18 18 18 86 86 86
-- 42 42 42 14 14 14 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 14 14 14
-- 42 42 42 90 90 90 22 22 22 2 2 6
-- 42 42 42 2 2 6 18 18 18 218 218 218
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 250 250 250 221 221 221
--218 218 218 101 101 101 2 2 6 14 14 14
-- 18 18 18 38 38 38 10 10 10 2 2 6
-- 2 2 6 2 2 6 2 2 6 78 78 78
-- 58 58 58 22 22 22 6 6 6 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 6 6 6 18 18 18
-- 54 54 54 82 82 82 2 2 6 26 26 26
-- 22 22 22 2 2 6 123 123 123 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 250 250 250
--238 238 238 198 198 198 6 6 6 38 38 38
-- 58 58 58 26 26 26 38 38 38 2 2 6
-- 2 2 6 2 2 6 2 2 6 46 46 46
-- 78 78 78 30 30 30 10 10 10 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 10 10 10 30 30 30
-- 74 74 74 58 58 58 2 2 6 42 42 42
-- 2 2 6 22 22 22 231 231 231 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 250 250 250
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 246 246 246 46 46 46 38 38 38
-- 42 42 42 14 14 14 38 38 38 14 14 14
-- 2 2 6 2 2 6 2 2 6 6 6 6
-- 86 86 86 46 46 46 14 14 14 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 6 6 6 14 14 14 42 42 42
-- 90 90 90 18 18 18 18 18 18 26 26 26
-- 2 2 6 116 116 116 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 250 250 250 238 238 238
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 94 94 94 6 6 6
-- 2 2 6 2 2 6 10 10 10 34 34 34
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 74 74 74 58 58 58 22 22 22 6 6 6
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 10 10 10 26 26 26 66 66 66
-- 82 82 82 2 2 6 38 38 38 6 6 6
-- 14 14 14 210 210 210 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 246 246 246 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 144 144 144 2 2 6
-- 2 2 6 2 2 6 2 2 6 46 46 46
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 42 42 42 74 74 74 30 30 30 10 10 10
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 6 6 6 14 14 14 42 42 42 90 90 90
-- 26 26 26 6 6 6 42 42 42 2 2 6
-- 74 74 74 250 250 250 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 242 242 242 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 182 182 182 2 2 6
-- 2 2 6 2 2 6 2 2 6 46 46 46
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 10 10 10 86 86 86 38 38 38 10 10 10
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 10 10 10 26 26 26 66 66 66 82 82 82
-- 2 2 6 22 22 22 18 18 18 2 2 6
--149 149 149 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 234 234 234 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 206 206 206 2 2 6
-- 2 2 6 2 2 6 2 2 6 38 38 38
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 6 6 6 86 86 86 46 46 46 14 14 14
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 18 18 18 46 46 46 86 86 86 18 18 18
-- 2 2 6 34 34 34 10 10 10 6 6 6
--210 210 210 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 234 234 234 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 221 221 221 6 6 6
-- 2 2 6 2 2 6 6 6 6 30 30 30
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 82 82 82 54 54 54 18 18 18
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 26 26 26 66 66 66 62 62 62 2 2 6
-- 2 2 6 38 38 38 10 10 10 26 26 26
--238 238 238 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 238 238 238
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 6 6 6
-- 2 2 6 2 2 6 10 10 10 30 30 30
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 66 66 66 58 58 58 22 22 22
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 38 38 38 78 78 78 6 6 6 2 2 6
-- 2 2 6 46 46 46 14 14 14 42 42 42
--246 246 246 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 234 234 234 10 10 10
-- 2 2 6 2 2 6 22 22 22 14 14 14
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 66 66 66 62 62 62 22 22 22
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 6 6 6 18 18 18
-- 50 50 50 74 74 74 2 2 6 2 2 6
-- 14 14 14 70 70 70 34 34 34 62 62 62
--250 250 250 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 246 246 246
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 234 234 234 14 14 14
-- 2 2 6 2 2 6 30 30 30 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 66 66 66 62 62 62 22 22 22
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 6 6 6 18 18 18
-- 54 54 54 62 62 62 2 2 6 2 2 6
-- 2 2 6 30 30 30 46 46 46 70 70 70
--250 250 250 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 246 246 246
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 226 226 226 10 10 10
-- 2 2 6 6 6 6 30 30 30 2 2 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 66 66 66 58 58 58 22 22 22
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 6 6 6 22 22 22
-- 58 58 58 62 62 62 2 2 6 2 2 6
-- 2 2 6 2 2 6 30 30 30 78 78 78
--250 250 250 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 246 246 246
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 206 206 206 2 2 6
-- 22 22 22 34 34 34 18 14 6 22 22 22
-- 26 26 26 18 18 18 6 6 6 2 2 6
-- 2 2 6 82 82 82 54 54 54 18 18 18
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 6 6 6 26 26 26
-- 62 62 62 106 106 106 74 54 14 185 133 11
--210 162 10 121 92 8 6 6 6 62 62 62
--238 238 238 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 246 246 246
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 158 158 158 18 18 18
-- 14 14 14 2 2 6 2 2 6 2 2 6
-- 6 6 6 18 18 18 66 66 66 38 38 38
-- 6 6 6 94 94 94 50 50 50 18 18 18
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 10 10 10 10 10 10 18 18 18 38 38 38
-- 78 78 78 142 134 106 216 158 10 242 186 14
--246 190 14 246 190 14 156 118 10 10 10 10
-- 90 90 90 238 238 238 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 250 250 250
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 246 230 190
--238 204 91 238 204 91 181 142 44 37 26 9
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 38 38 38 46 46 46
-- 26 26 26 106 106 106 54 54 54 18 18 18
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 6 6 6 14 14 14 22 22 22
-- 30 30 30 38 38 38 50 50 50 70 70 70
--106 106 106 190 142 34 226 170 11 242 186 14
--246 190 14 246 190 14 246 190 14 154 114 10
-- 6 6 6 74 74 74 226 226 226 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 231 231 231 250 250 250
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 228 184 62
--241 196 14 241 208 19 232 195 16 38 30 10
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 6 6 6 30 30 30 26 26 26
--203 166 17 154 142 90 66 66 66 26 26 26
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 6 6 6 18 18 18 38 38 38 58 58 58
-- 78 78 78 86 86 86 101 101 101 123 123 123
--175 146 61 210 150 10 234 174 13 246 186 14
--246 190 14 246 190 14 246 190 14 238 190 10
--102 78 10 2 2 6 46 46 46 198 198 198
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 234 234 234 242 242 242
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 224 178 62
--242 186 14 241 196 14 210 166 10 22 18 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 6 6 6 121 92 8
--238 202 15 232 195 16 82 82 82 34 34 34
-- 10 10 10 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 14 14 14 38 38 38 70 70 70 154 122 46
--190 142 34 200 144 11 197 138 11 197 138 11
--213 154 11 226 170 11 242 186 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--225 175 15 46 32 6 2 2 6 22 22 22
--158 158 158 250 250 250 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 250 250 250 242 242 242 224 178 62
--239 182 13 236 186 11 213 154 11 46 32 6
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 2 2 6 2 2 6 61 42 6 225 175 15
--238 190 10 236 186 11 112 100 78 42 42 42
-- 14 14 14 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 22 22 22 54 54 54 154 122 46 213 154 11
--226 170 11 230 174 11 226 170 11 226 170 11
--236 178 12 242 186 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--241 196 14 184 144 12 10 10 10 2 2 6
-- 6 6 6 116 116 116 242 242 242 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 231 231 231 198 198 198 214 170 54
--236 178 12 236 178 12 210 150 10 137 92 6
-- 18 14 6 2 2 6 2 2 6 2 2 6
-- 6 6 6 70 47 6 200 144 11 236 178 12
--239 182 13 239 182 13 124 112 88 58 58 58
-- 22 22 22 6 6 6 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 30 30 30 70 70 70 180 133 36 226 170 11
--239 182 13 242 186 14 242 186 14 246 186 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 232 195 16 98 70 6 2 2 6
-- 2 2 6 2 2 6 66 66 66 221 221 221
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 206 206 206 198 198 198 214 166 58
--230 174 11 230 174 11 216 158 10 192 133 9
--163 110 8 116 81 8 102 78 10 116 81 8
--167 114 7 197 138 11 226 170 11 239 182 13
--242 186 14 242 186 14 162 146 94 78 78 78
-- 34 34 34 14 14 14 6 6 6 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 30 30 30 78 78 78 190 142 34 226 170 11
--239 182 13 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 241 196 14 203 166 17 22 18 6
-- 2 2 6 2 2 6 2 2 6 38 38 38
--218 218 218 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--250 250 250 206 206 206 198 198 198 202 162 69
--226 170 11 236 178 12 224 166 10 210 150 10
--200 144 11 197 138 11 192 133 9 197 138 11
--210 150 10 226 170 11 242 186 14 246 190 14
--246 190 14 246 186 14 225 175 15 124 112 88
-- 62 62 62 30 30 30 14 14 14 6 6 6
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 30 30 30 78 78 78 174 135 50 224 166 10
--239 182 13 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 241 196 14 139 102 15
-- 2 2 6 2 2 6 2 2 6 2 2 6
-- 78 78 78 250 250 250 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--250 250 250 214 214 214 198 198 198 190 150 46
--219 162 10 236 178 12 234 174 13 224 166 10
--216 158 10 213 154 11 213 154 11 216 158 10
--226 170 11 239 182 13 246 190 14 246 190 14
--246 190 14 246 190 14 242 186 14 206 162 42
--101 101 101 58 58 58 30 30 30 14 14 14
-- 6 6 6 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 10 10 10
-- 30 30 30 74 74 74 174 135 50 216 158 10
--236 178 12 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 241 196 14 226 184 13
-- 61 42 6 2 2 6 2 2 6 2 2 6
-- 22 22 22 238 238 238 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 226 226 226 187 187 187 180 133 36
--216 158 10 236 178 12 239 182 13 236 178 12
--230 174 11 226 170 11 226 170 11 230 174 11
--236 178 12 242 186 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 186 14 239 182 13
--206 162 42 106 106 106 66 66 66 34 34 34
-- 14 14 14 6 6 6 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 0 0 0
-- 0 0 0 0 0 0 0 0 0 6 6 6
-- 26 26 26 70 70 70 163 133 67 213 154 11
--236 178 12 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 246 190 14
--246 190 14 246 190 14 246 190 14 241 196 14
--190 146 13 18 14 6 2 2 6 2 2 6
-- 46 46 46 246 246 246 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 253 253 253 253 253 253 253 253 253
--253 253 253 221 221 221 86 86 86 156 107 11
--216 158 10 236 178 12 242 186 14 246 186 14
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