diff options
Diffstat (limited to 'target/linux/brcm2708/patches-3.10/0015-sdhci-bcm2708-assume-50-MHz-eMMC-clock.patch')
-rw-r--r-- | target/linux/brcm2708/patches-3.10/0015-sdhci-bcm2708-assume-50-MHz-eMMC-clock.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-3.10/0015-sdhci-bcm2708-assume-50-MHz-eMMC-clock.patch b/target/linux/brcm2708/patches-3.10/0015-sdhci-bcm2708-assume-50-MHz-eMMC-clock.patch new file mode 100644 index 0000000000..cc34aff13e --- /dev/null +++ b/target/linux/brcm2708/patches-3.10/0015-sdhci-bcm2708-assume-50-MHz-eMMC-clock.patch @@ -0,0 +1,23 @@ +From 55ed27d2c44fcf2e808ba26cc2a1c9c4041500da Mon Sep 17 00:00:00 2001 +From: Grigori Goronzy <greg@blackbox> +Date: Mon, 11 Jun 2012 18:58:40 +0200 +Subject: [PATCH 015/174] sdhci-bcm2708: assume 50 MHz eMMC clock + +80 MHz clock isnt't suited well to be dividable to get SD clocks of 25 +MHz (default mode) or 50 MHz (high speed mode). 50 MHz are perfect to +drive the SD interface at ideal frequencies. +--- + drivers/mmc/host/sdhci-bcm2708.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mmc/host/sdhci-bcm2708.c ++++ b/drivers/mmc/host/sdhci-bcm2708.c +@@ -73,7 +73,7 @@ + #define BCM2708_SDHCI_SLEEP_TIMEOUT 1000 /* msecs */ + + /* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */ +-#define BCM2708_EMMC_CLOCK_FREQ 80000000 ++#define BCM2708_EMMC_CLOCK_FREQ 50000000 + + /*****************************************************************************\ + * * |