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-rw-r--r--target/linux/brcm2708/patches-3.10/0012-sdhci-bcm2708-remove-custom-clock-handling.patch95
1 files changed, 95 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-3.10/0012-sdhci-bcm2708-remove-custom-clock-handling.patch b/target/linux/brcm2708/patches-3.10/0012-sdhci-bcm2708-remove-custom-clock-handling.patch
new file mode 100644
index 0000000000..58bcee3d56
--- /dev/null
+++ b/target/linux/brcm2708/patches-3.10/0012-sdhci-bcm2708-remove-custom-clock-handling.patch
@@ -0,0 +1,95 @@
+From 3f65aaaabc3ddc09bacf06bb608f8bab5671fb18 Mon Sep 17 00:00:00 2001
+From: Grigori Goronzy <greg@blackbox>
+Date: Mon, 11 Jun 2012 18:52:04 +0200
+Subject: [PATCH 012/174] sdhci-bcm2708: remove custom clock handling
+
+The custom clock handling code is redundant and buggy. The MMC/SDHCI
+subsystem does a better job than it, so remove it for good.
+---
+ drivers/mmc/host/sdhci-bcm2708.c | 65 +---------------------------------------
+ 1 file changed, 1 insertion(+), 64 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-bcm2708.c
++++ b/drivers/mmc/host/sdhci-bcm2708.c
+@@ -353,68 +353,9 @@ void sdhci_bcm2708_writeb(struct sdhci_h
+
+ static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host)
+ {
+- return 20000000; // this value is in Hz (20MHz)
++ return BCM2708_EMMC_CLOCK_FREQ;
+ }
+
+-static unsigned int sdhci_bcm2708_get_timeout_clock(struct sdhci_host *host)
+-{
+- if(host->clock)
+- return (host->clock / 1000); // this value is in kHz (100MHz)
+- else
+- return (sdhci_bcm2708_get_max_clock(host) / 1000);
+-}
+-
+-static void sdhci_bcm2708_set_clock(struct sdhci_host *host, unsigned int clock)
+-{
+- int div = 0;
+- u16 clk = 0;
+- unsigned long timeout;
+-
+- if (clock == host->clock)
+- return;
+-
+- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+-
+- if (clock == 0)
+- goto out;
+-
+- if (BCM2708_EMMC_CLOCK_FREQ <= clock)
+- div = 1;
+- else {
+- for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
+- if ((BCM2708_EMMC_CLOCK_FREQ / div) <= clock)
+- break;
+- }
+- }
+-
+- DBG( "desired SD clock: %d, actual: %d\n",
+- clock, BCM2708_EMMC_CLOCK_FREQ / div);
+-
+- clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+- clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
+- << SDHCI_DIVIDER_HI_SHIFT;
+- clk |= SDHCI_CLOCK_INT_EN;
+-
+- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+-
+- timeout = 20;
+- while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
+- & SDHCI_CLOCK_INT_STABLE)) {
+- if (timeout == 0) {
+- printk(KERN_ERR "%s: Internal clock never "
+- "stabilised.\n", mmc_hostname(host->mmc));
+- return;
+- }
+- timeout--;
+- mdelay(1);
+- }
+-
+- clk |= SDHCI_CLOCK_CARD_EN;
+- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+-out:
+- host->clock = clock;
+- }
+-
+ /*****************************************************************************\
+ * *
+ * DMA Operation *
+@@ -1189,11 +1130,7 @@ static struct sdhci_ops sdhci_bcm2708_op
+ #else
+ #error The BCM2708 SDHCI driver needs CONFIG_MMC_SDHCI_IO_ACCESSORS to be set
+ #endif
+- //.enable_dma = NULL,
+- .set_clock = sdhci_bcm2708_set_clock,
+ .get_max_clock = sdhci_bcm2708_get_max_clock,
+- //.get_min_clock = NULL,
+- .get_timeout_clock = sdhci_bcm2708_get_timeout_clock,
+
+ #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA
+ // Platform DMA operations