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diff --git a/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch b/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch
new file mode 100644
index 0000000000..e4c6343e3f
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+++ b/target/linux/bmips/patches-5.10/402-Documentation-add-BCM6358-pincontroller-binding-docu.patch
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+From 9fbcbe08479bcb3609952b66627e2d612173229a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:00 +0200
+Subject: [PATCH 03/12] Documentation: add BCM6358 pincontroller binding
+ documentation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding documentation for the pincontrol core found in BCM6358 SoCs.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../pinctrl/brcm,bcm6358-pinctrl.yaml | 131 ++++++++++++++++++
+ 1 file changed, 131 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml
+@@ -0,0 +1,131 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6358-pinctrl.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM6358 pin controller
++
++maintainers:
++ - Álvaro Fernández Rojas <noltari@gmail.com>
++ - Jonas Gorski <jonas.gorski@gmail.com>
++
++description: |+
++ The pin controller node should be the child of a syscon node.
++
++ Refer to the the bindings described in
++ Documentation/devicetree/bindings/mfd/syscon.yaml
++
++properties:
++ compatible:
++ const: brcm,bcm6358-pinctrl
++
++ gpio-controller: true
++
++ '#gpio-cells':
++ description:
++ Specifies the pin number and flags, as defined in
++ include/dt-bindings/gpio/gpio.h
++ const: 2
++
++ interrupts-extended:
++ description:
++ One interrupt per each of the 4 GPIO ports supported by the controller,
++ sorted by port number ascending order.
++ minItems: 6
++ maxItems: 6
++
++patternProperties:
++ '^.*$':
++ if:
++ type: object
++ then:
++ properties:
++ function:
++ $ref: "/schemas/types.yaml#/definitions/string"
++ enum: [ ebi_cs, uart1, serial_led, legacy_led, led, spi_cs, utopia,
++ pwm_syn_clk, sys_irq ]
++
++ pins:
++ $ref: "/schemas/types.yaml#/definitions/string"
++ enum: [ ebi_cs_grp, uart1_grp, serial_led_grp, legacy_led_grp,
++ led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ]
++
++required:
++ - compatible
++ - gpio-controller
++ - '#gpio-cells'
++
++additionalProperties: false
++
++examples:
++ - |
++ gpio@fffe0080 {
++ compatible = "syscon", "simple-mfd";
++ reg = <0xfffe0080 0x80>;
++
++ pinctrl: pinctrl {
++ compatible = "brcm,bcm6358-pinctrl";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ interrupts-extended = <&ext_intc1 0 0>,
++ <&ext_intc1 1 0>,
++ <&ext_intc0 0 0>,
++ <&ext_intc0 1 0>,
++ <&ext_intc0 2 0>,
++ <&ext_intc0 3 0>;
++ interrupt-names = "gpio32",
++ "gpio33",
++ "gpio34",
++ "gpio35",
++ "gpio36",
++ "gpio37";
++
++ pinctrl_ebi_cs: ebi_cs {
++ function = "ebi_cs";
++ groups = "ebi_cs_grp";
++ };
++
++ pinctrl_uart1: uart1 {
++ function = "uart1";
++ groups = "uart1_grp";
++ };
++
++ pinctrl_serial_led: serial_led {
++ function = "serial_led";
++ groups = "serial_led_grp";
++ };
++
++ pinctrl_legacy_led: legacy_led {
++ function = "legacy_led";
++ groups = "legacy_led_grp";
++ };
++
++ pinctrl_led: led {
++ function = "led";
++ groups = "led_grp";
++ };
++
++ pinctrl_spi_cs_23: spi_cs {
++ function = "spi_cs";
++ groups = "spi_cs_grp";
++ };
++
++ pinctrl_utopia: utopia {
++ function = "utopia";
++ groups = "utopia_grp";
++ };
++
++ pinctrl_pwm_syn_clk: pwm_syn_clk {
++ function = "pwm_syn_clk";
++ groups = "pwm_syn_clk_grp";
++ };
++
++ pinctrl_sys_irq: sys_irq {
++ function = "sys_irq";
++ groups = "sys_irq_grp";
++ };
++ };
++ };