diff options
Diffstat (limited to 'target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch')
| -rw-r--r-- | target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch | 145 |
1 files changed, 0 insertions, 145 deletions
diff --git a/target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch b/target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch deleted file mode 100644 index 090ffeb43c..0000000000 --- a/target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch +++ /dev/null @@ -1,145 +0,0 @@ ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -184,7 +184,8 @@ enum bcm63xx_regs_set { - RSET_PCMDMAC, - RSET_PCMDMAS, - RSET_RNG, -- RSET_MISC -+ RSET_MISC, -+ RSET_NAND - }; - - #define RSET_DSL_LMEM_SIZE (64 * 1024 * 4) -@@ -262,6 +263,7 @@ enum bcm63xx_regs_set { - #define BCM_3368_PCMDMAS_BASE (0xdeadbeef) - #define BCM_3368_RNG_BASE (0xdeadbeef) - #define BCM_3368_MISC_BASE (0xdeadbeef) -+#define BCM_3368_NAND_BASE (0xdeadbeef) - - /* - * 6318 register sets base address -@@ -309,6 +311,7 @@ enum bcm63xx_regs_set { - #define BCM_6318_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6318_RNG_BASE (0xdeadbeef) - #define BCM_6318_MISC_BASE (0xb0000280) -+#define BCM_6318_NAND_BASE (0xdeadbeef) - #define BCM_6318_OTP_BASE (0xdeadbeef) - - #define BCM_6318_STRAP_BASE (0xb0000900) -@@ -359,6 +362,7 @@ enum bcm63xx_regs_set { - #define BCM_6328_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6328_RNG_BASE (0xdeadbeef) - #define BCM_6328_MISC_BASE (0xb0001800) -+#define BCM_6328_NAND_BASE (0xb0000200) - #define BCM_6328_OTP_BASE (0xb0000600) - - /* -@@ -408,6 +412,7 @@ enum bcm63xx_regs_set { - #define BCM_6338_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6338_RNG_BASE (0xdeadbeef) - #define BCM_6338_MISC_BASE (0xdeadbeef) -+#define BCM_6338_NAND_BASE (0xdeadbeef) - - /* - * 6345 register sets base address -@@ -456,6 +461,7 @@ enum bcm63xx_regs_set { - #define BCM_6345_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6345_RNG_BASE (0xdeadbeef) - #define BCM_6345_MISC_BASE (0xdeadbeef) -+#define BCM_6345_NAND_BASE (0xdeadbeef) - - /* - * 6348 register sets base address -@@ -502,6 +508,7 @@ enum bcm63xx_regs_set { - #define BCM_6348_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6348_RNG_BASE (0xdeadbeef) - #define BCM_6348_MISC_BASE (0xdeadbeef) -+#define BCM_6348_NAND_BASE (0xdeadbeef) - - /* - * 6358 register sets base address -@@ -548,7 +555,7 @@ enum bcm63xx_regs_set { - #define BCM_6358_PCMDMAS_BASE (0xfffe1a00) - #define BCM_6358_RNG_BASE (0xdeadbeef) - #define BCM_6358_MISC_BASE (0xdeadbeef) -- -+#define BCM_6358_NAND_BASE (0xdeadbeef) - - /* - * 6362 register sets base address -@@ -596,6 +603,7 @@ enum bcm63xx_regs_set { - #define BCM_6362_PCMDMAS_BASE (0xdeadbeef) - #define BCM_6362_RNG_BASE (0xdeadbeef) - #define BCM_6362_MISC_BASE (0xb0001800) -+#define BCM_6362_NAND_BASE (0xb0000200) - - #define BCM_6362_NAND_REG_BASE (0xb0000200) - #define BCM_6362_NAND_CACHE_BASE (0xb0000600) -@@ -651,6 +659,7 @@ enum bcm63xx_regs_set { - #define BCM_6368_PCMDMAS_BASE (0xb0005c00) - #define BCM_6368_RNG_BASE (0xb0004180) - #define BCM_6368_MISC_BASE (0xdeadbeef) -+#define BCM_6368_NAND_BASE (0xb0000200) - - /* - * 63268 register sets base address -@@ -698,6 +707,7 @@ enum bcm63xx_regs_set { - #define BCM_63268_PCMDMAS_BASE (0xdeadbeef) - #define BCM_63268_RNG_BASE (0xdeadbeef) - #define BCM_63268_MISC_BASE (0xb0001800) -+#define BCM_63268_NAND_BASE (0xb0000200) - - extern const unsigned long *bcm63xx_regs_base; - -@@ -743,6 +753,7 @@ extern const unsigned long *bcm63xx_regs - [RSET_PCMDMAS] = BCM_## __cpu ##_PCMDMAS_BASE, \ - [RSET_RNG] = BCM_## __cpu ##_RNG_BASE, \ - [RSET_MISC] = BCM_## __cpu ##_MISC_BASE, \ -+ [RSET_NAND] = BCM_## __cpu ##_NAND_BASE, \ - - - static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h -@@ -111,5 +111,7 @@ - #define bcm_ddr_writel(v, o) bcm_rset_writel(RSET_DDR, (v), (o)) - #define bcm_misc_readl(o) bcm_rset_readl(RSET_MISC, (o)) - #define bcm_misc_writel(v, o) bcm_rset_writel(RSET_MISC, (v), (o)) -+#define bcm_nand_readl(o) bcm_rset_readl(RSET_NAND, (o)) -+#define bcm_nand_writel(v, o) bcm_rset_writel(RSET_NAND, (v), (o)) - - #endif /* ! BCM63XX_IO_H_ */ ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1688,4 +1688,31 @@ - #define OTP_USER_BITS_6328_REG(i) (0x20 + (i) * 4) - #define OTP_6328_REG3_TP1_DISABLED BIT(9) - -+/************************************************************************* -+ * _REG relative to RSET_NAND -+ *************************************************************************/ -+ -+#define NAND_CS_SEL_REG 0x14 -+#define NAND_CS_SEL_EBC_CS0_SEL (1 << 0) -+#define NAND_CS_SEL_EBC_CS1_SEL (1 << 1) -+#define NAND_CS_SEL_EBC_CS2_SEL (1 << 2) -+#define NAND_CS_SEL_EBC_CS3_SEL (1 << 3) -+#define NAND_CS_SEL_EBC_CS4_SEL (1 << 4) -+#define NAND_CS_SEL_EBC_CS5_SEL (1 << 5) -+#define NAND_CS_SEL_EBC_CS6_SEL (1 << 6) -+#define NAND_CS_SEL_EBC_CS7_SEL (1 << 7) -+#define NAND_CS_SEL_EBI_CS0_USES_NAND (1 << 8) -+#define NAND_CS_SEL_EBI_CS1_USES_NAND (1 << 9) -+#define NAND_CS_SEL_EBI_CS2_USES_NAND (1 << 10) -+#define NAND_CS_SEL_EBI_CS3_USES_NAND (1 << 11) -+#define NAND_CS_SEL_EBI_CS4_USES_NAND (1 << 12) -+#define NAND_CS_SEL_EBI_CS5_USES_NAND (1 << 13) -+#define NAND_CS_SEL_EBI_CS6_USES_NAND (1 << 14) -+#define NAND_CS_SEL_EBI_CS7_USES_NAND (1 << 15) -+#define NAND_CS_SEL_WR_PROT_BLK0 (1 << 28) -+#define NAND_CS_SEL_AUTO_DEV_ID (1 << 30) -+#define NAND_CS_SEL_CS_LOCK (1 << 31) -+ -+#define NAND_CS_XOR_REG 0x18 -+ - #endif /* BCM63XX_REGS_H_ */ |