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path: root/target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch
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Diffstat (limited to 'target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch')
-rw-r--r--target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch124
1 files changed, 0 insertions, 124 deletions
diff --git a/target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch b/target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch
deleted file mode 100644
index 15d4679670..0000000000
--- a/target/linux/bcm63xx/patches-5.4/347-MIPS-BCM6318-USB-support.patch
+++ /dev/null
@@ -1,124 +0,0 @@
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -682,6 +682,12 @@
- #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
- #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
-
-+#define GPIO_PINMUX_SEL0_6318 0x1c
-+#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
-+#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-
- #define GPIO_PINMUX_OTHR_REG 0x24
- #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
-@@ -1000,6 +1006,7 @@
-
- #define USBH_PRIV_SWAP_6358_REG 0x0
- #define USBH_PRIV_SWAP_6368_REG 0x1c
-+#define USBH_PRIV_SWAP_6318_REG 0x0c
-
- #define USBH_PRIV_SWAP_USBD_SHIFT 6
- #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
-@@ -1025,6 +1032,13 @@
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-
-+#define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
-+#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
-+#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-+
-
- /*************************************************************************
- * _REG relative to RSET_USBD
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -125,6 +125,15 @@ void __init board_early_setup(const stru
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
-+
-+#if IS_ENABLED(CONFIG_USB)
-+ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
-+ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
-+ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
-+ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
-+ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
-+ }
-+#endif
- }
-
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318
- bool "support 6318 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HAVE_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"