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-rw-r--r--target/linux/bcm63xx/patches-5.10/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch45
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/bcm63xx/patches-5.10/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/bcm63xx/patches-5.10/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
new file mode 100644
index 0000000000..c5041a923e
--- /dev/null
+++ b/target/linux/bcm63xx/patches-5.10/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
@@ -0,0 +1,45 @@
+From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -14,6 +14,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext.h>
+ #include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -21,6 +23,9 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+
++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
++ mips_cpu_irq_of_init);
++
+ void __init arch_init_irq(void)
+ {
+ void __iomem *periph_bases[2];
+@@ -29,6 +34,13 @@ void __init arch_init_irq(void)
+ int periph_irqs[2] = { 2, 3 };
+ int ext_irqs[6];
+
++#ifdef CONFIG_OF
++ if (initial_boot_params) {
++ irqchip_init();
++ return;
++ }
++#endif
++
+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);