diff options
Diffstat (limited to 'target/linux/bcm53xx')
-rw-r--r-- | target/linux/bcm53xx/patches-4.14/081-spi-bcm-qspi-switch-back-to-reading-flash-using-smal.patch | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/target/linux/bcm53xx/patches-4.14/081-spi-bcm-qspi-switch-back-to-reading-flash-using-smal.patch b/target/linux/bcm53xx/patches-4.14/081-spi-bcm-qspi-switch-back-to-reading-flash-using-smal.patch deleted file mode 100644 index 91b06b19fe..0000000000 --- a/target/linux/bcm53xx/patches-4.14/081-spi-bcm-qspi-switch-back-to-reading-flash-using-smal.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 940ec770c295682993d1cccce3081fd7c74fece8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Oct 2018 09:42:17 +0200 -Subject: [PATCH] spi: bcm-qspi: switch back to reading flash using smaller - chunks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Fixing/optimizing bcm_qspi_bspi_read() performance introduced two -changes: -1) It added a loop to read all requested data using multiple BSPI ops. -2) It bumped max size of a single BSPI block request from 256 to 512 B. - -The later change resulted in occasional BSPI timeouts causing a -regression. - -For some unknown reason hardware doesn't always handle reads as expected -when using 512 B chunks. In such cases it may happen that BSPI returns -amount of requested bytes without the last 1-3 ones. It provides the -remaining bytes later but doesn't raise an interrupt until another LR -start. - -Switching back to 256 B reads fixes that problem and regression. - -Fixes: 345309fa7c0c ("spi: bcm-qspi: Fix bcm_qspi_bspi_read() performance") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Mark Brown <broonie@kernel.org> -Cc: stable@vger.kernel.org ---- - drivers/spi/spi-bcm-qspi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/spi/spi-bcm-qspi.c -+++ b/drivers/spi/spi-bcm-qspi.c -@@ -88,7 +88,7 @@ - #define BSPI_BPP_MODE_SELECT_MASK BIT(8) - #define BSPI_BPP_ADDR_SELECT_MASK BIT(16) - --#define BSPI_READ_LENGTH 512 -+#define BSPI_READ_LENGTH 256 - - /* MSPI register offsets */ - #define MSPI_SPCR0_LSB 0x000 |