diff options
Diffstat (limited to 'target/linux/bcm53xx')
| -rw-r--r-- | target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch (renamed from target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch) | 6 | ||||
| -rw-r--r-- | target/linux/bcm53xx/patches-5.10/033-v5.16-0025-ARM-dts-BCM5301X-Add-interrupt-properties-to-GPIO-no.patch | 26 | ||||
| -rw-r--r-- | target/linux/bcm53xx/patches-5.10/034-v5.17-0004-ARM-BCM53016-MR32-convert-to-Broadcom-iProc-I2C-Driv.patch (renamed from target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch) | 33 | ||||
| -rw-r--r-- | target/linux/bcm53xx/patches-5.10/034-v5.17-0005-ARM-dts-BCM5301X-update-CRU-block-description.patch | 60 |
4 files changed, 116 insertions, 9 deletions
diff --git a/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch b/target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch index 39ce3259fb..36ac748af0 100644 --- a/target/linux/bcm53xx/patches-5.10/040-v5.16-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch +++ b/target/linux/bcm53xx/patches-5.10/033-v5.16-0024-ARM-dts-BCM5301X-Fix-I2C-controller-interrupt.patch @@ -1,6 +1,6 @@ -From beda1bbdb19baa8319ed81fa370fe0c5b91d05df Mon Sep 17 00:00:00 2001 +From 6e238362b9793bf334c9bed2291b571cbbc75b0b Mon Sep 17 00:00:00 2001 From: Florian Fainelli <f.fainelli@gmail.com> -Date: Tue, 26 Oct 2021 11:36:22 -0700 +Date: Wed, 27 Oct 2021 12:37:29 -0700 Subject: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt The I2C interrupt controller line is off by 32 because the datasheet @@ -10,6 +10,8 @@ the SPI interrupts to be numbered from 0 relative to the SPI base. Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +Tested-by: Christian Lamparter <chunkeey@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- arch/arm/boot/dts/bcm5301x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/bcm53xx/patches-5.10/033-v5.16-0025-ARM-dts-BCM5301X-Add-interrupt-properties-to-GPIO-no.patch b/target/linux/bcm53xx/patches-5.10/033-v5.16-0025-ARM-dts-BCM5301X-Add-interrupt-properties-to-GPIO-no.patch new file mode 100644 index 0000000000..5a4e4497d6 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/033-v5.16-0025-ARM-dts-BCM5301X-Add-interrupt-properties-to-GPIO-no.patch @@ -0,0 +1,26 @@ +From acead95bf77a34cae7ff04dd99387046310cca0d Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Thu, 28 Oct 2021 09:46:53 -0700 +Subject: [PATCH] ARM: dts: BCM5301X: Add interrupt properties to GPIO node + +The GPIO controller is also an interrupt controller provider and is +currently missing the appropriate 'interrupt-controller' and +'#interrupt-cells' properties to denote that. + +Fixes: fb026d3de33b ("ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file") +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm5301x.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -242,6 +242,8 @@ + + gpio-controller; + #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; + }; + + pcie0: pcie@12000 { diff --git a/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch b/target/linux/bcm53xx/patches-5.10/034-v5.17-0004-ARM-BCM53016-MR32-convert-to-Broadcom-iProc-I2C-Driv.patch index 9e2adfa131..fae0f02cdf 100644 --- a/target/linux/bcm53xx/patches-5.10/332-Meraki-MR32-use-hw-i2c.patch +++ b/target/linux/bcm53xx/patches-5.10/034-v5.17-0004-ARM-BCM53016-MR32-convert-to-Broadcom-iProc-I2C-Driv.patch @@ -1,16 +1,35 @@ +From de7880016665afe7fa7d40e1fafa859260d53ba1 Mon Sep 17 00:00:00 2001 From: Christian Lamparter <chunkeey@gmail.com> -Date: Sat, 12 Sep 2020 22:11:12 +0200 -Subject: bcm53xx: Meraki MR32 use hw i2c +Date: Thu, 28 Oct 2021 09:03:44 +0200 +Subject: [PATCH] ARM: BCM53016: MR32: convert to Broadcom iProc I2C Driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit -replace the i2c-gpio provided i2c functionality with the -hardware in the SoC. This can be activated once the -internal i2c works as well as the bit-banged i2c-gpio. +replaces the bit-banged i2c-gpio provided i2c functionality +with the hardware in the SoC. +During review of the MR32, Florian Fainelli pointed out that the +SoC has a real I2C-controller. Furthermore, the connected pins +(SDA and SCL) would line up perfectly for use. Back then I couldn't +get it working though and I left it with i2c-gpio (which worked). + +Now we know the reason: the interrupt was incorrectly specified. +(Hence, this patch depends on Florian Fainelli's +"ARM: dts: BCM5301X: Fix I2C controller interrupt" patch). + +Cc: Florian Fainelli <f.fainelli@gmail.com> +Cc: Rafał Miłecki <zajec5@gmail.com> +Cc: Matthew Hagan <mnhagan88@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 62 ++++++++++------------ + 1 file changed, 28 insertions(+), 34 deletions(-) --- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts +++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts -@@ -85,40 +85,6 @@ +@@ -84,40 +84,6 @@ max-brightness = <255>; }; }; @@ -51,7 +70,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com> }; &uart0 { -@@ -229,3 +195,31 @@ +@@ -228,3 +194,31 @@ }; }; }; diff --git a/target/linux/bcm53xx/patches-5.10/034-v5.17-0005-ARM-dts-BCM5301X-update-CRU-block-description.patch b/target/linux/bcm53xx/patches-5.10/034-v5.17-0005-ARM-dts-BCM5301X-update-CRU-block-description.patch new file mode 100644 index 0000000000..0a817e8fd1 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/034-v5.17-0005-ARM-dts-BCM5301X-update-CRU-block-description.patch @@ -0,0 +1,60 @@ +From 31fd9b79dc580301c53a001482755ba7e88c2809 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Fri, 29 Oct 2021 18:05:23 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: update CRU block description +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This describes CRU in a way matching documentation and fixes: + +arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: cru@100: $nodename:0: 'cru@100' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' + From schema: /lib/python3.6/site-packages/dtschema/schemas/simple-bus.yaml + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm5301x.dtsi | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -423,14 +423,14 @@ + #address-cells = <1>; + #size-cells = <1>; + +- cru@100 { +- compatible = "simple-bus"; ++ cru-bus@100 { ++ compatible = "brcm,ns-cru", "simple-mfd"; + reg = <0x100 0x1a4>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + +- lcpll0: lcpll0@100 { ++ lcpll0: clock-controller@100 { + #clock-cells = <1>; + compatible = "brcm,nsp-lcpll0"; + reg = <0x100 0x14>; +@@ -439,7 +439,7 @@ + "sdio", "ddr_phy"; + }; + +- genpll: genpll@140 { ++ genpll: clock-controller@140 { + #clock-cells = <1>; + compatible = "brcm,nsp-genpll"; + reg = <0x140 0x24>; +@@ -450,6 +450,11 @@ + "sata1", "sata2"; + }; + ++ syscon@180 { ++ compatible = "brcm,cru-clkset", "syscon"; ++ reg = <0x180 0x4>; ++ }; ++ + pinctrl: pin-controller@1c0 { + compatible = "brcm,bcm4708-pinmux"; + reg = <0x1c0 0x24>; |