diff options
Diffstat (limited to 'target/linux/bcm53xx/patches-4.9/033-0013-ARM-dts-BCM5301X-Correct-GIC_PPI-interrupt-flags.patch')
-rw-r--r-- | target/linux/bcm53xx/patches-4.9/033-0013-ARM-dts-BCM5301X-Correct-GIC_PPI-interrupt-flags.patch | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-4.9/033-0013-ARM-dts-BCM5301X-Correct-GIC_PPI-interrupt-flags.patch b/target/linux/bcm53xx/patches-4.9/033-0013-ARM-dts-BCM5301X-Correct-GIC_PPI-interrupt-flags.patch new file mode 100644 index 0000000000..70df2013cc --- /dev/null +++ b/target/linux/bcm53xx/patches-4.9/033-0013-ARM-dts-BCM5301X-Correct-GIC_PPI-interrupt-flags.patch @@ -0,0 +1,41 @@ +From 0e34079cd1f674449749aafe4be07336177de90d Mon Sep 17 00:00:00 2001 +From: Jon Mason <jon.mason@broadcom.com> +Date: Thu, 2 Mar 2017 19:21:32 -0500 +Subject: [PATCH] ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +GIC_PPI flags were misconfigured for the timers, resulting in errors +like: +[ 0.000000] GIC: PPI11 is secure or misconfigured + +Changing them to being edge triggered corrects the issue + +Suggested-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Jon Mason <jon.mason@broadcom.com> +Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC") +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm5301x.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -66,14 +66,14 @@ + timer@20200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x20200 0x100>; +- interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; + clocks = <&periph_clk>; + }; + + local-timer@20600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x20600 0x100>; +- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; + clocks = <&periph_clk>; + }; + |