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Diffstat (limited to 'target/linux/bcm53xx/patches-4.9/032-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch')
-rw-r--r--target/linux/bcm53xx/patches-4.9/032-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch56
1 files changed, 56 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-4.9/032-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch b/target/linux/bcm53xx/patches-4.9/032-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch
new file mode 100644
index 0000000000..a39a31f015
--- /dev/null
+++ b/target/linux/bcm53xx/patches-4.9/032-0006-ARM-BCM53573-Specify-USB-ports-of-on-SoC-controllers.patch
@@ -0,0 +1,56 @@
+From 92c6f000cb3a4280166d812d88cda3011717b548 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 7 Dec 2016 08:56:55 +0100
+Subject: [PATCH 6/6] ARM: BCM53573: Specify USB ports of on-SoC controllers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom OHCI and EHCI controllers always have 2 ports each on the root
+hub. Describe them in DT to allow specifying extra info or referencing
+port nodes.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm53573.dtsi | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -124,6 +124,17 @@
+ reg = <0x4000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ehci_port1: port@1 {
++ reg = <1>;
++ };
++
++ ehci_port2: port@2 {
++ reg = <2>;
++ };
+ };
+
+ ohci: ohci@d000 {
+@@ -133,6 +144,17 @@
+ reg = <0xd000 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ohci_port1: port@1 {
++ reg = <1>;
++ };
++
++ ohci_port2: port@2 {
++ reg = <2>;
++ };
+ };
+ };
+