diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch')
| -rw-r--r-- | target/linux/bcm27xx/patches-5.4/950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch | 182 |
1 files changed, 182 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch b/target/linux/bcm27xx/patches-5.4/950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch new file mode 100644 index 0000000000..ed9f1e1492 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch @@ -0,0 +1,182 @@ +From a934bc7776953d7ce8e27c2d8720de58d5ceeeef Mon Sep 17 00:00:00 2001 +From: Phil Elwell <phil@raspberrypi.com> +Date: Thu, 30 Jul 2020 15:13:09 +0100 +Subject: [PATCH] overlays: Fix sc16is75x overlays w.r.t. serdev + +Enabling serdev support in rpi-5.4.y had the unintended consequence of +making any UART device node with a subnode look like a "serdev" node, +which prevents it from having the usual /dev/ttyXXX character device. +Solve the problem by moving the subnode (a static clock declaration) +into the root node. + +At the same time, regularise (and sometimes correct) the overlays. + +See: https://github.com/raspberrypi/linux/issues/3765 + +Signed-off-by: Phil Elwell <phil@raspberrypi.com> +--- + .../dts/overlays/sc16is750-i2c-overlay.dts | 23 +++++++++------- + .../dts/overlays/sc16is752-i2c-overlay.dts | 27 ++++++++++--------- + .../dts/overlays/sc16is752-spi0-overlay.dts | 21 +++++++++------ + .../dts/overlays/sc16is752-spi1-overlay.dts | 6 ++--- + 4 files changed, 45 insertions(+), 32 deletions(-) + +--- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts +@@ -13,26 +13,31 @@ + + sc16is750: sc16is750@48 { + compatible = "nxp,sc16is750"; +- reg = <0x48>; /* address */ ++ reg = <0x48>; /* i2c address */ + clocks = <&sc16is750_clk>; + interrupt-parent = <&gpio>; + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */ ++ gpio-controller; + #gpio-cells = <2>; +- +- sc16is750_clk: sc16is750_clk { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <14745600>; +- }; ++ i2c-max-frequency = <400000>; + }; + }; + }; + ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ sc16is750_clk: sc16is750_i2c_clk@48 { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <14745600>; ++ }; ++ }; ++ }; + + __overrides__ { + int_pin = <&sc16is750>,"interrupts:0"; +- addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name"; ++ addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name"; + xtal = <&sc16is750_clk>,"clock-frequency:0"; + }; +- + }; +--- a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts +@@ -5,29 +5,32 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target = <&i2c1>; +- +- frag1: __overlay__ { ++ target = <&i2c_arm>; ++ __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + sc16is752: sc16is752@48 { + compatible = "nxp,sc16is752"; +- reg = <0x48>; // i2c address ++ reg = <0x48>; /* i2c address */ + clocks = <&sc16is752_clk>; + interrupt-parent = <&gpio>; +- interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */ ++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */ + gpio-controller; +- #gpio-cells = <0>; ++ #gpio-cells = <2>; + i2c-max-frequency = <400000>; +- status = "okay"; ++ }; ++ }; ++ }; + +- sc16is752_clk: sc16is752_clk { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <14745600>; +- }; ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ sc16is752_clk: sc16is752_i2c_clk@48 { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <14745600>; + }; + }; + }; +--- a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts +@@ -17,15 +17,9 @@ + clocks = <&sc16is752_clk>; + interrupt-parent = <&gpio>; + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */ +- #gpio-controller; ++ gpio-controller; + #gpio-cells = <2>; + spi-max-frequency = <4000000>; +- +- sc16is752_clk: sc16is752_clk { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <14745600>; +- }; + }; + }; + }; +@@ -37,8 +31,19 @@ + }; + }; + ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ sc16is752_clk: sc16is752_spi0_0_clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <14745600>; ++ }; ++ }; ++ }; ++ + __overrides__ { + int_pin = <&sc16is752>,"interrupts:0"; +- xtal = <&sc16is752_clk>, "clock-frequency:0"; ++ xtal = <&sc16is752_clk>,"clock-frequency:0"; + }; + }; +--- a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts +@@ -21,7 +21,7 @@ + + fragment@1 { + target = <&spi1>; +- frag1: __overlay__ { ++ __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; +@@ -35,7 +35,7 @@ + clocks = <&sc16is752_clk>; + interrupt-parent = <&gpio>; + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */ +- #gpio-controller; ++ gpio-controller; + #gpio-cells = <2>; + spi-max-frequency = <4000000>; + }; +@@ -52,7 +52,7 @@ + fragment@3 { + target-path = "/"; + __overlay__ { +- sc16is752_clk: sc16is752_spi1_clk { ++ sc16is752_clk: sc16is752_spi1_0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <14745600>; |