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Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0552-drm-vc4-crtc-Rename-HVS-channel-to-output.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-0552-drm-vc4-crtc-Rename-HVS-channel-to-output.patch80
1 files changed, 80 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0552-drm-vc4-crtc-Rename-HVS-channel-to-output.patch b/target/linux/bcm27xx/patches-5.4/950-0552-drm-vc4-crtc-Rename-HVS-channel-to-output.patch
new file mode 100644
index 0000000000..cf854fceb8
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0552-drm-vc4-crtc-Rename-HVS-channel-to-output.patch
@@ -0,0 +1,80 @@
+From a106e57a643c957af9a71eb2ec3a62df69a1f371 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Thu, 26 Dec 2019 13:49:17 +0100
+Subject: [PATCH] drm/vc4: crtc: Rename HVS channel to output
+
+In vc5, the HVS has 6 outputs and 3 FIFOs (or channels), with
+pixelvalves each being assigned to a given output, but each output can
+then be muxed to feed from multiple FIFOs.
+
+Since vc4 had that entirely static, both were probably equivalent, but
+since that changes, let's rename hvs_channel to hvs_output in the
+vc4_crtc_data, since a pixelvalve is really connected to an output, and
+not to a FIFO.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 10 +++++-----
+ drivers/gpu/drm/vc4/vc4_drv.h | 4 ++--
+ 2 files changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -1057,7 +1057,7 @@ static const struct drm_crtc_helper_func
+ };
+
+ static const struct vc4_crtc_data bcm2835_pv0_data = {
+- .hvs_channel = 0,
++ .hvs_output = 0,
+ .debugfs_name = "crtc0_regs",
+ .pixels_per_clock = 1,
+ .encoder_types = {
+@@ -1067,7 +1067,7 @@ static const struct vc4_crtc_data bcm283
+ };
+
+ static const struct vc4_crtc_data bcm2835_pv1_data = {
+- .hvs_channel = 2,
++ .hvs_output = 2,
+ .debugfs_name = "crtc1_regs",
+ .pixels_per_clock = 1,
+ .encoder_types = {
+@@ -1077,7 +1077,7 @@ static const struct vc4_crtc_data bcm283
+ };
+
+ static const struct vc4_crtc_data bcm2835_pv2_data = {
+- .hvs_channel = 1,
++ .hvs_output = 1,
+ .debugfs_name = "crtc2_regs",
+ .pixels_per_clock = 1,
+ .encoder_types = {
+@@ -1106,7 +1106,7 @@ static void vc4_set_crtc_possible_masks(
+ int i;
+
+ /* HVS FIFO2 can feed the TXP IP. */
+- if (crtc_data->hvs_channel == 2 &&
++ if (crtc_data->hvs_output == 2 &&
+ encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) {
+ encoder->possible_crtcs |= drm_crtc_mask(crtc);
+ continue;
+@@ -1168,7 +1168,7 @@ static int vc4_crtc_bind(struct device *
+ drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
+ &vc4_crtc_funcs, NULL);
+ drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
+- vc4_crtc->channel = vc4_crtc->data->hvs_channel;
++ vc4_crtc->channel = vc4_crtc->data->hvs_output;
+ drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
+ drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -452,8 +452,8 @@ to_vc4_encoder(struct drm_encoder *encod
+ }
+
+ struct vc4_crtc_data {
+- /* Which channel of the HVS this pixelvalve sources from. */
+- int hvs_channel;
++ /* Which output of the HVS this pixelvalve sources from. */
++ int hvs_output;
+
+ /* Number of pixels output per clock period */
+ u8 pixels_per_clock;