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Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Register-all-the-planes-at-once.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Register-all-the-planes-at-once.patch128
1 files changed, 128 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Register-all-the-planes-at-once.patch b/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Register-all-the-planes-at-once.patch
new file mode 100644
index 0000000000..e917410b86
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0549-drm-vc4-plane-Register-all-the-planes-at-once.patch
@@ -0,0 +1,128 @@
+From bb2b068209d73b320cac7222a3b8ecef9b0dcc9a Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Thu, 6 Feb 2020 14:46:14 +0100
+Subject: [PATCH] drm/vc4: plane: Register all the planes at once
+
+Instead of creating planes for each CRTC, we eventually want to create all
+the planes for each CRTCs.
+
+In order to make that more convenient, let's iterate on the CRTCs in the
+plane creation function instead of its caller.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 9 ++----
+ drivers/gpu/drm/vc4/vc4_drv.h | 3 +-
+ drivers/gpu/drm/vc4/vc4_plane.c | 54 +++++++++++++++++----------------
+ 3 files changed, 32 insertions(+), 34 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -253,7 +253,6 @@ static int vc4_drm_bind(struct device *d
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+ struct drm_device *drm;
+- struct drm_crtc *crtc;
+ struct vc4_dev *vc4;
+ struct device_node *node;
+ int ret = 0;
+@@ -292,11 +291,9 @@ static int vc4_drm_bind(struct device *d
+ if (ret)
+ goto gem_destroy;
+
+- drm_for_each_crtc(crtc, drm) {
+- ret = vc4_plane_create_additional_planes(drm, crtc);
+- if (ret)
+- continue;
+- }
++ ret = vc4_plane_create_additional_planes(drm);
++ if (ret)
++ goto unbind_all;
+
+ drm_fb_helper_remove_conflicting_framebuffers(NULL, "vc4drmfb", false);
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -855,8 +855,7 @@ int vc4_kms_load(struct drm_device *dev)
+ /* vc4_plane.c */
+ struct drm_plane *vc4_plane_init(struct drm_device *dev,
+ enum drm_plane_type type);
+-int vc4_plane_create_additional_planes(struct drm_device *dev,
+- struct drm_crtc *crtc);
++int vc4_plane_create_additional_planes(struct drm_device *dev);
+ u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
+ u32 vc4_plane_dlist_size(const struct drm_plane_state *state);
+ void vc4_plane_async_set_fb(struct drm_plane *plane,
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -1438,39 +1438,41 @@ struct drm_plane *vc4_plane_init(struct
+ return plane;
+ }
+
+-int vc4_plane_create_additional_planes(struct drm_device *drm,
+- struct drm_crtc *crtc)
++int vc4_plane_create_additional_planes(struct drm_device *drm)
+ {
+ struct drm_plane *cursor_plane;
++ struct drm_crtc *crtc;
+ unsigned int i;
+
+- /* Set up some arbitrary number of planes. We're not limited
+- * by a set number of physical registers, just the space in
+- * the HVS (16k) and how small an plane can be (28 bytes).
+- * However, each plane we set up takes up some memory, and
+- * increases the cost of looping over planes, which atomic
+- * modesetting does quite a bit. As a result, we pick a
+- * modest number of planes to expose, that should hopefully
+- * still cover any sane usecase.
+- */
+- for (i = 0; i < 8; i++) {
+- struct drm_plane *plane =
+- vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
+-
+- if (IS_ERR(plane))
+- continue;
+-
+- plane->possible_crtcs = drm_crtc_mask(crtc);
+- }
+-
+- /* Set up the legacy cursor after overlay initialization,
+- * since we overlay planes on the CRTC in the order they were
+- * initialized.
+- */
+- cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
+- if (!IS_ERR(cursor_plane)) {
+- cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
+- crtc->cursor = cursor_plane;
++ drm_for_each_crtc(crtc, drm) {
++ /* Set up some arbitrary number of planes. We're not limited
++ * by a set number of physical registers, just the space in
++ * the HVS (16k) and how small an plane can be (28 bytes).
++ * However, each plane we set up takes up some memory, and
++ * increases the cost of looping over planes, which atomic
++ * modesetting does quite a bit. As a result, we pick a
++ * modest number of planes to expose, that should hopefully
++ * still cover any sane usecase.
++ */
++ for (i = 0; i < 8; i++) {
++ struct drm_plane *plane =
++ vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
++
++ if (IS_ERR(plane))
++ continue;
++
++ plane->possible_crtcs = drm_crtc_mask(crtc);
++ }
++
++ /* Set up the legacy cursor after overlay initialization,
++ * since we overlay planes on the CRTC in the order they were
++ * initialized.
++ */
++ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
++ if (!IS_ERR(cursor_plane)) {
++ cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
++ crtc->cursor = cursor_plane;
++ }
+ }
+
+ return 0;