1 files changed, 0 insertions, 68 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0529-dt-bindings-clock-Add-BCM2711-DVP-binding.patch b/target/linux/bcm27xx/patches-5.4/950-0529-dt-bindings-clock-Add-BCM2711-DVP-binding.patch
deleted file mode 100644
index ca87cbac83..0000000000
--- a/target/linux/bcm27xx/patches-5.4/950-0529-dt-bindings-clock-Add-BCM2711-DVP-binding.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 67405a5468f8972f3a3db44292aff8fc05188db9 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 13 Feb 2020 17:50:31 +0100
-Subject: [PATCH] dt-bindings: clock: Add BCM2711 DVP binding
-
-The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
-signals. Let's add a binding for it.
-
-Cc: Philipp Zabel <p.zabel@pengutronix.de>
-Cc: Rob Herring <robh+dt@kernel.org>
-Cc: devicetree@vger.kernel.org
-Reviewed-by: Rob Herring <robh+dt@kernel.org>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- .../bindings/clock/brcm,bcm2711-dvp.yaml      | 47 +++++++++++++++++++
- 1 file changed, 47 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
-@@ -0,0 +1,47 @@
-+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: Broadcom BCM2711 HDMI DVP Device Tree Bindings
-+
-+maintainers:
-+  - Maxime Ripard <mripard@kernel.org>
-+
-+properties:
-+  "#clock-cells":
-+    const: 1
-+
-+  "#reset-cells":
-+    const: 1
-+
-+  compatible:
-+    const: brcm,brcm2711-dvp
-+
-+  reg:
-+    maxItems: 1
-+
-+  clocks:
-+    maxItems: 1
-+
-+required:
-+  - "#clock-cells"
-+  - "#reset-cells"
-+  - compatible
-+  - reg
-+  - clocks
-+
-+additionalProperties: false
-+
-+examples:
-+  - |
-+    dvp: clock@7ef00000 {
-+        compatible = "brcm,brcm2711-dvp";
-+        reg = <0x7ef00000 0x10>;
-+        clocks = <&clk_108MHz>;
-+        #clock-cells = <1>;
-+        #reset-cells = <1>;
-+    };
-+
-+...