diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0518-clk-bcm-rpi-Create-a-data-structure-for-the-clocks.patch')
| -rw-r--r-- | target/linux/bcm27xx/patches-5.4/950-0518-clk-bcm-rpi-Create-a-data-structure-for-the-clocks.patch | 126 |
1 files changed, 0 insertions, 126 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0518-clk-bcm-rpi-Create-a-data-structure-for-the-clocks.patch b/target/linux/bcm27xx/patches-5.4/950-0518-clk-bcm-rpi-Create-a-data-structure-for-the-clocks.patch deleted file mode 100644 index 85b6f4a6e2..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0518-clk-bcm-rpi-Create-a-data-structure-for-the-clocks.patch +++ /dev/null @@ -1,126 +0,0 @@ -From 8af8b61bf6b5689af9f29f0e04e57c832dad0406 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard <maxime@cerno.tech> -Date: Fri, 7 Feb 2020 16:01:33 +0100 -Subject: [PATCH] clk: bcm: rpi: Create a data structure for the clocks - -So far the driver has really only been providing a single clock, and stored -both the data associated to that clock in particular with the data -associated to the "controller". - -Since we will change that in the future, let's decouple the clock data from -the provider data. - -Cc: Michael Turquette <mturquette@baylibre.com> -Cc: linux-clk@vger.kernel.org -Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> -Reviewed-by: Stephen Boyd <sboyd@kernel.org> -Signed-off-by: Maxime Ripard <maxime@cerno.tech> ---- - drivers/clk/bcm/clk-raspberrypi.c | 40 ++++++++++++++++++++----------- - 1 file changed, 26 insertions(+), 14 deletions(-) - ---- a/drivers/clk/bcm/clk-raspberrypi.c -+++ b/drivers/clk/bcm/clk-raspberrypi.c -@@ -35,11 +35,15 @@ struct raspberrypi_clk { - struct device *dev; - struct rpi_firmware *firmware; - struct platform_device *cpufreq; -+}; -+ -+struct raspberrypi_clk_data { -+ struct clk_hw hw; - - unsigned long min_rate; - unsigned long max_rate; - -- struct clk_hw pllb; -+ struct raspberrypi_clk *rpi; - }; - - /* -@@ -83,8 +87,9 @@ static int raspberrypi_clock_property(st - - static int raspberrypi_fw_pll_is_on(struct clk_hw *hw) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -+ struct raspberrypi_clk_data *data = -+ container_of(hw, struct raspberrypi_clk_data, hw); -+ struct raspberrypi_clk *rpi = data->rpi; - u32 val = 0; - int ret; - -@@ -101,8 +106,9 @@ static int raspberrypi_fw_pll_is_on(stru - static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw, - unsigned long parent_rate) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -+ struct raspberrypi_clk_data *data = -+ container_of(hw, struct raspberrypi_clk_data, hw); -+ struct raspberrypi_clk *rpi = data->rpi; - u32 val = 0; - int ret; - -@@ -119,8 +125,9 @@ static unsigned long raspberrypi_fw_pll_ - static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -+ struct raspberrypi_clk_data *data = -+ container_of(hw, struct raspberrypi_clk_data, hw); -+ struct raspberrypi_clk *rpi = data->rpi; - u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE; - int ret; - -@@ -142,13 +149,13 @@ static int raspberrypi_fw_pll_set_rate(s - static int raspberrypi_pll_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -+ struct raspberrypi_clk_data *data = -+ container_of(hw, struct raspberrypi_clk_data, hw); - u64 div, final_rate; - u32 ndiv, fdiv; - - /* We can't use req->rate directly as it would overflow */ -- final_rate = clamp(req->rate, rpi->min_rate, rpi->max_rate); -+ final_rate = clamp(req->rate, data->min_rate, data->max_rate); - - div = (u64)final_rate << A2W_PLL_FRAC_BITS; - do_div(div, req->best_parent_rate); -@@ -173,10 +180,15 @@ static const struct clk_ops raspberrypi_ - - static int raspberrypi_register_pllb(struct raspberrypi_clk *rpi) - { -+ struct raspberrypi_clk_data *data; - struct clk_init_data init = {}; - u32 min_rate = 0, max_rate = 0; - int ret; - -+ data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ data->rpi = rpi; - - /* All of the PLLs derive from the external oscillator. */ - init.parent_names = (const char *[]){ "osc" }; -@@ -215,12 +227,12 @@ static int raspberrypi_register_pllb(str - dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n", - min_rate, max_rate); - -- rpi->min_rate = min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -- rpi->max_rate = max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ data->min_rate = min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ data->max_rate = max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; - -- rpi->pllb.init = &init; -+ data->hw.init = &init; - -- return devm_clk_hw_register(rpi->dev, &rpi->pllb); -+ return devm_clk_hw_register(rpi->dev, &data->hw); - } - - static struct clk_fixed_factor raspberrypi_clk_pllb_arm = { |