aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch1846
1 files changed, 1846 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch b/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch
new file mode 100644
index 0000000000..a66202a2c9
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch
@@ -0,0 +1,1846 @@
+From 134e06abd2d002edfdac3561656ab9e8161b29a3 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Fri, 31 Jan 2020 16:53:13 +0000
+Subject: [PATCH] ARM: dts: Clean out downstream BCM2711/2838 files
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 157 -----
+ arch/arm/boot/dts/bcm2711-rpi.dtsi | 7 -
+ arch/arm/boot/dts/bcm2711.dtsi | 890 --------------------------
+ arch/arm/boot/dts/bcm2838-rpi.dtsi | 25 -
+ arch/arm/boot/dts/bcm2838.dtsi | 733 ---------------------
+ 5 files changed, 1812 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+ delete mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi
+ delete mode 100644 arch/arm/boot/dts/bcm2711.dtsi
+ delete mode 100644 arch/arm/boot/dts/bcm2838-rpi.dtsi
+ delete mode 100644 arch/arm/boot/dts/bcm2838.dtsi
+
+--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
++++ /dev/null
+@@ -1,157 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/dts-v1/;
+-#include "bcm2711.dtsi"
+-#include "bcm2835-rpi.dtsi"
+-#include "bcm283x-rpi-usb-peripheral.dtsi"
+-
+-/ {
+- compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
+- model = "Raspberry Pi 4 Model B";
+-
+- chosen {
+- /* 8250 auxiliary UART instead of pl011 */
+- stdout-path = "serial1:115200n8";
+- };
+-
+- /* Will be filled by the bootloader */
+- memory@0 {
+- device_type = "memory";
+- reg = <0 0 0>;
+- };
+-
+- aliases {
+- ethernet0 = &genet;
+- };
+-
+- leds {
+- act {
+- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
+- };
+-
+- pwr {
+- label = "PWR";
+- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
+- };
+- };
+-
+- wifi_pwrseq: wifi-pwrseq {
+- compatible = "mmc-pwrseq-simple";
+- reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
+- };
+-
+- sd_io_1v8_reg: sd_io_1v8_reg {
+- compatible = "regulator-gpio";
+- regulator-name = "vdd-sd-io";
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-boot-on;
+- regulator-always-on;
+- regulator-settling-time-us = <5000>;
+- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
+- states = <1800000 0x1
+- 3300000 0x0>;
+- status = "okay";
+- };
+-};
+-
+-&firmware {
+- expgpio: gpio {
+- compatible = "raspberrypi,firmware-gpio";
+- gpio-controller;
+- #gpio-cells = <2>;
+- gpio-line-names = "BT_ON",
+- "WL_ON",
+- "PWR_LED_OFF",
+- "GLOBAL_RESET",
+- "VDD_SD_IO_SEL",
+- "CAM_GPIO",
+- "",
+- "";
+- status = "okay";
+- };
+-};
+-
+-&pwm1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
+- status = "okay";
+-};
+-
+-/* SDHCI is used to control the SDIO for wireless */
+-&sdhci {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&emmc_gpio34>;
+- bus-width = <4>;
+- non-removable;
+- mmc-pwrseq = <&wifi_pwrseq>;
+- status = "okay";
+-
+- brcmf: wifi@1 {
+- reg = <1>;
+- compatible = "brcm,bcm4329-fmac";
+- };
+-};
+-
+-/* EMMC2 is used to drive the SD card */
+-&emmc2 {
+- vqmmc-supply = <&sd_io_1v8_reg>;
+- broken-cd;
+- status = "okay";
+-};
+-
+-&genet {
+- phy-handle = <&phy1>;
+- phy-mode = "rgmii-rxid";
+- status = "okay";
+-};
+-
+-&genet_mdio {
+- phy1: ethernet-phy@1 {
+- /* No PHY interrupt */
+- reg = <0x1>;
+- };
+-};
+-
+-/* uart0 communicates with the BT module */
+-&uart0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
+- uart-has-rtscts;
+- status = "okay";
+-
+- bluetooth {
+- compatible = "brcm,bcm43438-bt";
+- max-speed = <2000000>;
+- shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
+- };
+-};
+-
+-/* uart1 is mapped to the pin header */
+-&uart1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&uart1_gpio14>;
+- status = "okay";
+-};
+-
+-&vchiq {
+- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-/ {
+- __overrides__ {
+- act_led_gpio = <&act_led>,"gpios:4";
+- act_led_activelow = <&act_led>,"gpios:8";
+- act_led_trigger = <&act_led>,"linux,default-trigger";
+-
+- pwr_led_gpio = <&pwr_led>,"gpios:4";
+- pwr_led_activelow = <&pwr_led>,"gpios:8";
+- pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
+-
+- eth_led0 = <&phy1>,"led-modes:0";
+- eth_led1 = <&phy1>,"led-modes:4";
+-
+- sd_poll_once = <&emmc2>, "non-removable?";
+- };
+-};
+--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi
++++ /dev/null
+@@ -1,7 +0,0 @@
+-#include "bcm2708-rpi.dtsi"
+-#include "bcm2838-rpi.dtsi"
+-
+-&v3d {
+- /* Undo the overwriting by bcm270x.dtsi */
+- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+-};
+--- a/arch/arm/boot/dts/bcm2711.dtsi
++++ /dev/null
+@@ -1,890 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-#include "bcm283x.dtsi"
+-
+-#include <dt-bindings/interrupt-controller/arm-gic.h>
+-#include <dt-bindings/soc/bcm2835-pm.h>
+-
+-/ {
+- compatible = "brcm,bcm2711";
+-
+- #address-cells = <2>;
+- #size-cells = <1>;
+-
+- interrupt-parent = <&gicv2>;
+-
+- reserved-memory {
+- #address-cells = <2>;
+- #size-cells = <1>;
+- ranges;
+-
+- /*
+- * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
+- * that's not good enough for the BCM2711 as some devices can
+- * only address the lower 1G of memory (ZONE_DMA).
+- */
+- linux,cma {
+- compatible = "shared-dma-pool";
+- size = <0x2000000>; /* 32MB */
+- alloc-ranges = <0x0 0x00000000 0x40000000>;
+- reusable;
+- linux,cma-default;
+- };
+- };
+-
+-
+- soc {
+- /*
+- * Defined ranges:
+- * Common BCM283x peripherals
+- * BCM2711-specific peripherals
+- * ARM-local peripherals
+- */
+- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
+- <0x7c000000 0x0 0xfc000000 0x02000000>,
+- <0x40000000 0x0 0xff800000 0x00800000>;
+- /* Emulate a contiguous 30-bit address range for DMA */
+- dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>;
+-
+- /*
+- * This node is the provider for the enable-method for
+- * bringing up secondary cores.
+- */
+- local_intc: local_intc@40000000 {
+- compatible = "brcm,bcm2836-l1-intc";
+- reg = <0x40000000 0x100>;
+- };
+-
+- gicv2: interrupt-controller@40041000 {
+- interrupt-controller;
+- #interrupt-cells = <3>;
+- compatible = "arm,gic-400";
+- reg = <0x40041000 0x1000>,
+- <0x40042000 0x2000>,
+- <0x40044000 0x2000>,
+- <0x40046000 0x2000>;
+- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_HIGH)>;
+- };
+-
+- dma: dma@7e007000 {
+- compatible = "brcm,bcm2835-dma";
+- reg = <0x7e007000 0xb00>;
+- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+- /* DMA lite 7 - 10 */
+- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-names = "dma0",
+- "dma1",
+- "dma2",
+- "dma3",
+- "dma4",
+- "dma5",
+- "dma6",
+- "dma7",
+- "dma8",
+- "dma9",
+- "dma10";
+- #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x07f5>;
+- };
+-
+- pm: watchdog@7e100000 {
+- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+- #power-domain-cells = <1>;
+- #reset-cells = <1>;
+- reg = <0x7e100000 0x114>,
+- <0x7e00a000 0x24>,
+- <0x7ec11000 0x20>;
+- clocks = <&clocks BCM2835_CLOCK_V3D>,
+- <&clocks BCM2835_CLOCK_PERI_IMAGE>,
+- <&clocks BCM2835_CLOCK_H264>,
+- <&clocks BCM2835_CLOCK_ISP>;
+- clock-names = "v3d", "peri_image", "h264", "isp";
+- system-power-controller;
+- };
+-
+- rng@7e104000 {
+- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+-
+- /* RNG is incompatible with brcm,bcm2835-rng */
+- status = "disabled";
+- };
+-
+- uart2: serial@7e201400 {
+- compatible = "arm,pl011", "arm,primecell";
+- reg = <0x7e201400 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart3: serial@7e201600 {
+- compatible = "arm,pl011", "arm,primecell";
+- reg = <0x7e201600 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart4: serial@7e201800 {
+- compatible = "arm,pl011", "arm,primecell";
+- reg = <0x7e201800 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart5: serial@7e201a00 {
+- compatible = "arm,pl011", "arm,primecell";
+- reg = <0x7e201a00 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- spi3: spi@7e204600 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204600 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi4: spi@7e204800 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204800 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi5: spi@7e204a00 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204a00 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi6: spi@7e204c00 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204c00 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c3: i2c@7e205600 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- reg = <0x7e205600 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c4: i2c@7e205800 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- reg = <0x7e205800 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c5: i2c@7e205a00 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- reg = <0x7e205a00 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c6: i2c@7e205c00 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- reg = <0x7e205c00 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- pwm1: pwm@7e20c800 {
+- compatible = "brcm,bcm2835-pwm";
+- reg = <0x7e20c800 0x28>;
+- clocks = <&clocks BCM2835_CLOCK_PWM>;
+- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
+- assigned-clock-rates = <10000000>;
+- #pwm-cells = <2>;
+- status = "disabled";
+- };
+-
+- emmc2: emmc2@7e340000 {
+- compatible = "brcm,bcm2711-emmc2";
+- reg = <0x7e340000 0x100>;
+- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+- status = "disabled";
+- };
+-
+- hvs@7e400000 {
+- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+- };
+- };
+-
+- arm-pmu {
+- compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
+- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+- };
+-
+- timer {
+- compatible = "arm,armv8-timer";
+- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>;
+- /* This only applies to the ARMv7 stub */
+- arm,cpu-registers-not-fw-configured;
+- };
+-
+- cpus: cpus {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
+-
+- cpu0: cpu@0 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <0>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000d8>;
+- };
+-
+- cpu1: cpu@1 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <1>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000e0>;
+- };
+-
+- cpu2: cpu@2 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <2>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000e8>;
+- };
+-
+- cpu3: cpu@3 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <3>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000f0>;
+- };
+- };
+-
+- scb {
+- compatible = "simple-bus";
+- #address-cells = <2>;
+- #size-cells = <1>;
+-
+- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>;
+-
+- genet: ethernet@7d580000 {
+- compatible = "brcm,bcm2711-genet-v5";
+- reg = <0x0 0x7d580000 0x10000>;
+- #address-cells = <0x1>;
+- #size-cells = <0x1>;
+- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+- status = "disabled";
+-
+- genet_mdio: mdio@e14 {
+- compatible = "brcm,genet-mdio-v5";
+- reg = <0xe14 0x8>;
+- reg-names = "mdio";
+- #address-cells = <0x0>;
+- #size-cells = <0x1>;
+- };
+- };
+- };
+-};
+-
+-&clk_osc {
+- clock-frequency = <54000000>;
+-};
+-
+-&clocks {
+- compatible = "brcm,bcm2711-cprman";
+-};
+-
+-&cpu_thermal {
+- coefficients = <(-487) 410040>;
+-};
+-
+-&dsi0 {
+- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&dsi1 {
+- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&gpio {
+- compatible = "brcm,bcm2711-gpio";
+- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+-
+- gpclk0_gpio49: gpclk0_gpio49 {
+- pin-gpclk {
+- pins = "gpio49";
+- function = "alt1";
+- bias-disable;
+- };
+- };
+- gpclk1_gpio50: gpclk1_gpio50 {
+- pin-gpclk {
+- pins = "gpio50";
+- function = "alt1";
+- bias-disable;
+- };
+- };
+- gpclk2_gpio51: gpclk2_gpio51 {
+- pin-gpclk {
+- pins = "gpio51";
+- function = "alt1";
+- bias-disable;
+- };
+- };
+-
+- i2c0_gpio46: i2c0_gpio46 {
+- pin-sda {
+- function = "alt0";
+- pins = "gpio46";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt0";
+- pins = "gpio47";
+- bias-disable;
+- };
+- };
+- i2c1_gpio46: i2c1_gpio46 {
+- pin-sda {
+- function = "alt1";
+- pins = "gpio46";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt1";
+- pins = "gpio47";
+- bias-disable;
+- };
+- };
+- i2c3_gpio2: i2c3_gpio2 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio2";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio3";
+- bias-disable;
+- };
+- };
+- i2c3_gpio4: i2c3_gpio4 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio4";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio5";
+- bias-disable;
+- };
+- };
+- i2c4_gpio6: i2c4_gpio6 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio6";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio7";
+- bias-disable;
+- };
+- };
+- i2c4_gpio8: i2c4_gpio8 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio8";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio9";
+- bias-disable;
+- };
+- };
+- i2c5_gpio10: i2c5_gpio10 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio10";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio11";
+- bias-disable;
+- };
+- };
+- i2c5_gpio12: i2c5_gpio12 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio12";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio13";
+- bias-disable;
+- };
+- };
+- i2c6_gpio0: i2c6_gpio0 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio0";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio1";
+- bias-disable;
+- };
+- };
+- i2c6_gpio22: i2c6_gpio22 {
+- pin-sda {
+- function = "alt5";
+- pins = "gpio22";
+- bias-pull-up;
+- };
+- pin-scl {
+- function = "alt5";
+- pins = "gpio23";
+- bias-disable;
+- };
+- };
+- i2c_slave_gpio8: i2c_slave_gpio8 {
+- pins-i2c-slave {
+- pins = "gpio8",
+- "gpio9",
+- "gpio10",
+- "gpio11";
+- function = "alt3";
+- };
+- };
+-
+- jtag_gpio48: jtag_gpio48 {
+- pins-jtag {
+- pins = "gpio48",
+- "gpio49",
+- "gpio50",
+- "gpio51",
+- "gpio52",
+- "gpio53";
+- function = "alt4";
+- };
+- };
+-
+- mii_gpio28: mii_gpio28 {
+- pins-mii {
+- pins = "gpio28",
+- "gpio29",
+- "gpio30",
+- "gpio31";
+- function = "alt4";
+- };
+- };
+- mii_gpio36: mii_gpio36 {
+- pins-mii {
+- pins = "gpio36",
+- "gpio37",
+- "gpio38",
+- "gpio39";
+- function = "alt5";
+- };
+- };
+-
+- pcm_gpio50: pcm_gpio50 {
+- pins-pcm {
+- pins = "gpio50",
+- "gpio51",
+- "gpio52",
+- "gpio53";
+- function = "alt2";
+- };
+- };
+-
+- pwm0_0_gpio12: pwm0_0_gpio12 {
+- pin-pwm {
+- pins = "gpio12";
+- function = "alt0";
+- bias-disable;
+- };
+- };
+- pwm0_0_gpio18: pwm0_0_gpio18 {
+- pin-pwm {
+- pins = "gpio18";
+- function = "alt5";
+- bias-disable;
+- };
+- };
+- pwm1_0_gpio40: pwm1_0_gpio40 {
+- pin-pwm {
+- pins = "gpio40";
+- function = "alt0";
+- bias-disable;
+- };
+- };
+- pwm0_1_gpio13: pwm0_1_gpio13 {
+- pin-pwm {
+- pins = "gpio13";
+- function = "alt0";
+- bias-disable;
+- };
+- };
+- pwm0_1_gpio19: pwm0_1_gpio19 {
+- pin-pwm {
+- pins = "gpio19";
+- function = "alt5";
+- bias-disable;
+- };
+- };
+- pwm1_1_gpio41: pwm1_1_gpio41 {
+- pin-pwm {
+- pins = "gpio41";
+- function = "alt0";
+- bias-disable;
+- };
+- };
+- pwm0_1_gpio45: pwm0_1_gpio45 {
+- pin-pwm {
+- pins = "gpio45";
+- function = "alt0";
+- bias-disable;
+- };
+- };
+- pwm0_0_gpio52: pwm0_0_gpio52 {
+- pin-pwm {
+- pins = "gpio52";
+- function = "alt1";
+- bias-disable;
+- };
+- };
+- pwm0_1_gpio53: pwm0_1_gpio53 {
+- pin-pwm {
+- pins = "gpio53";
+- function = "alt1";
+- bias-disable;
+- };
+- };
+-
+- rgmii_gpio35: rgmii_gpio35 {
+- pin-start-stop {
+- pins = "gpio35";
+- function = "alt4";
+- };
+- pin-rx-ok {
+- pins = "gpio36";
+- function = "alt4";
+- };
+- };
+- rgmii_irq_gpio34: rgmii_irq_gpio34 {
+- pin-irq {
+- pins = "gpio34";
+- function = "alt5";
+- };
+- };
+- rgmii_irq_gpio39: rgmii_irq_gpio39 {
+- pin-irq {
+- pins = "gpio39";
+- function = "alt4";
+- };
+- };
+- rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
+- pins-mdio {
+- pins = "gpio28",
+- "gpio29";
+- function = "alt5";
+- };
+- };
+- rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
+- pins-mdio {
+- pins = "gpio37",
+- "gpio38";
+- function = "alt4";
+- };
+- };
+-
+- spi0_gpio46: spi0_gpio46 {
+- pins-spi {
+- pins = "gpio46",
+- "gpio47",
+- "gpio48",
+- "gpio49";
+- function = "alt2";
+- };
+- };
+- spi2_gpio46: spi2_gpio46 {
+- pins-spi {
+- pins = "gpio46",
+- "gpio47",
+- "gpio48",
+- "gpio49",
+- "gpio50";
+- function = "alt5";
+- };
+- };
+- spi3_gpio0: spi3_gpio0 {
+- pins-spi {
+- pins = "gpio0",
+- "gpio1",
+- "gpio2",
+- "gpio3";
+- function = "alt3";
+- };
+- };
+- spi4_gpio4: spi4_gpio4 {
+- pins-spi {
+- pins = "gpio4",
+- "gpio5",
+- "gpio6",
+- "gpio7";
+- function = "alt3";
+- };
+- };
+- spi5_gpio12: spi5_gpio12 {
+- pins-spi {
+- pins = "gpio12",
+- "gpio13",
+- "gpio14",
+- "gpio15";
+- function = "alt3";
+- };
+- };
+- spi6_gpio18: spi6_gpio18 {
+- pins-spi {
+- pins = "gpio18",
+- "gpio19",
+- "gpio20",
+- "gpio21";
+- function = "alt3";
+- };
+- };
+-
+- uart2_gpio0: uart2_gpio0 {
+- pin-tx {
+- pins = "gpio0";
+- function = "alt4";
+- bias-disable;
+- };
+- pin-rx {
+- pins = "gpio1";
+- function = "alt4";
+- bias-pull-up;
+- };
+- };
+- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
+- pin-cts {
+- pins = "gpio2";
+- function = "alt4";
+- bias-pull-up;
+- };
+- pin-rts {
+- pins = "gpio3";
+- function = "alt4";
+- bias-disable;
+- };
+- };
+- uart3_gpio4: uart3_gpio4 {
+- pin-tx {
+- pins = "gpio4";
+- function = "alt4";
+- bias-disable;
+- };
+- pin-rx {
+- pins = "gpio5";
+- function = "alt4";
+- bias-pull-up;
+- };
+- };
+- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
+- pin-cts {
+- pins = "gpio6";
+- function = "alt4";
+- bias-pull-up;
+- };
+- pin-rts {
+- pins = "gpio7";
+- function = "alt4";
+- bias-disable;
+- };
+- };
+- uart4_gpio8: uart4_gpio8 {
+- pin-tx {
+- pins = "gpio8";
+- function = "alt4";
+- bias-disable;
+- };
+- pin-rx {
+- pins = "gpio9";
+- function = "alt4";
+- bias-pull-up;
+- };
+- };
+- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
+- pin-cts {
+- pins = "gpio10";
+- function = "alt4";
+- bias-pull-up;
+- };
+- pin-rts {
+- pins = "gpio11";
+- function = "alt4";
+- bias-disable;
+- };
+- };
+- uart5_gpio12: uart5_gpio12 {
+- pin-tx {
+- pins = "gpio12";
+- function = "alt4";
+- bias-disable;
+- };
+- pin-rx {
+- pins = "gpio13";
+- function = "alt4";
+- bias-pull-up;
+- };
+- };
+- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
+- pin-cts {
+- pins = "gpio14";
+- function = "alt4";
+- bias-pull-up;
+- };
+- pin-rts {
+- pins = "gpio15";
+- function = "alt4";
+- bias-disable;
+- };
+- };
+-};
+-
+-&i2c0 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&i2c1 {
+- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&mailbox {
+- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&sdhci {
+- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&sdhost {
+- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi {
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi1 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi2 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&system_timer {
+- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&txp {
+- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&uart0 {
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&uart1 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&usb {
+- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&vec {
+- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+-};
+--- a/arch/arm/boot/dts/bcm2838-rpi.dtsi
++++ /dev/null
+@@ -1,25 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-
+-/ {
+- soc {
+- /delete-node/ mailbox@7e00b840;
+- };
+-};
+-
+-&scb {
+- vchiq: mailbox@7e00b840 {
+- compatible = "brcm,bcm2838-vchiq";
+- reg = <0 0x7e00b840 0x3c>;
+- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+- };
+-};
+-
+-&dma {
+- /* The VPU firmware uses DMA channel 11 for VCHIQ */
+- brcm,dma-channel-mask = <0x1f5>;
+-};
+-
+-&dma40 {
+- /* The VPU firmware DMA channel 11 for VCHIQ */
+- brcm,dma-channel-mask = <0x7000>;
+-};
+--- a/arch/arm/boot/dts/bcm2838.dtsi
++++ /dev/null
+@@ -1,733 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-#include "bcm283x.dtsi"
+-
+-#include <dt-bindings/interrupt-controller/arm-gic.h>
+-#include <dt-bindings/soc/bcm2835-pm.h>
+-
+-/ {
+- compatible = "brcm,bcm2838";
+-
+- #address-cells = <2>;
+- #size-cells = <1>;
+-
+- interrupt-parent = <&gicv2>;
+-
+- soc {
+- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
+- <0x7c000000 0x0 0xfc000000 0x02000000>,
+- <0x40000000 0x0 0xff800000 0x00800000>;
+- /* Emulate a contiguous 30-bit address range for DMA */
+- dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>;
+-
+- /delete-node/ interrupt-controller@7e00f300;
+- /delete-node/ v3d@7ec00000;
+-
+- local_intc: local_intc@40000000 {
+- compatible = "brcm,bcm2836-l1-intc";
+- reg = <0x40000000 0x100>;
+- };
+-
+- gicv2: interrupt-controller@40041000 {
+- interrupt-controller;
+- #interrupt-cells = <3>;
+- compatible = "arm,gic-400";
+- reg = <0x40041000 0x1000>,
+- <0x40042000 0x2000>,
+- <0x40044000 0x2000>,
+- <0x40046000 0x2000>;
+- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_HIGH)>;
+- };
+-
+- thermal: thermal@7d5d2200 {
+- compatible = "brcm,avs-tmon-bcm2838";
+- reg = <0x7d5d2200 0x2c>;
+- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-names = "tmon";
+- clocks = <&clocks BCM2835_CLOCK_TSENS>;
+- #thermal-sensor-cells = <0>;
+- status = "okay";
+- };
+-
+- pm: watchdog@7e100000 {
+- reg = <0x7e100000 0x114>,
+- <0x7e00a000 0x24>,
+- <0x7ec11000 0x20>;
+- };
+-
+- rng@7e104000 {
+- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+- };
+-
+- uart2: serial@7e201400 {
+- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+- reg = <0x7e201400 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart3: serial@7e201600 {
+- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+- reg = <0x7e201600 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart4: serial@7e201800 {
+- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+- reg = <0x7e201800 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- uart5: serial@7e201a00 {
+- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+- reg = <0x7e201a00 0x200>;
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_UART>,
+- <&clocks BCM2835_CLOCK_VPU>;
+- clock-names = "uartclk", "apb_pclk";
+- arm,primecell-periphid = <0x00241011>;
+- status = "disabled";
+- };
+-
+- spi@7e204000 {
+- reg = <0x7e204000 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- };
+-
+- spi3: spi@7e204600 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204600 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi4: spi@7e204800 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204800 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi5: spi@7e204a00 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204a00 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- spi6: spi@7e204c00 {
+- compatible = "brcm,bcm2835-spi";
+- reg = <0x7e204c00 0x0200>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c3: i2c@7e205600 {
+- compatible = "brcm,bcm2835-i2c";
+- reg = <0x7e205600 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c4: i2c@7e205800 {
+- compatible = "brcm,bcm2835-i2c";
+- reg = <0x7e205800 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c5: i2c@7e205a00 {
+- compatible = "brcm,bcm2835-i2c";
+- reg = <0x7e205a00 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- i2c6: i2c@7e205c00 {
+- compatible = "brcm,bcm2835-i2c";
+- reg = <0x7e205c00 0x200>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2835_CLOCK_VPU>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "disabled";
+- };
+-
+- pwm1: pwm@7e20c800 {
+- compatible = "brcm,bcm2835-pwm";
+- reg = <0x7e20c800 0x28>;
+- clocks = <&clocks BCM2835_CLOCK_PWM>;
+- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
+- assigned-clock-rates = <10000000>;
+- #pwm-cells = <2>;
+- status = "disabled";
+- };
+-
+- emmc2: emmc2@7e340000 {
+- compatible = "brcm,bcm2711-emmc2";
+- status = "okay";
+- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+- reg = <0x7e340000 0x100>;
+- };
+-
+- hvs@7e400000 {
+- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+- };
+- };
+-
+- arm-pmu {
+- compatible = "arm,cortex-a72-pmu";
+- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+- };
+-
+- timer {
+- compatible = "arm,armv7-timer";
+- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>,
+- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+- IRQ_TYPE_LEVEL_LOW)>;
+- arm,cpu-registers-not-fw-configured;
+- };
+-
+- cpus: cpus {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
+-
+- cpu0: cpu@0 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <0>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000d8>;
+- };
+-
+- cpu1: cpu@1 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <1>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000e0>;
+- };
+-
+- cpu2: cpu@2 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <2>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000e8>;
+- };
+-
+- cpu3: cpu@3 {
+- device_type = "cpu";
+- compatible = "arm,cortex-a72";
+- reg = <3>;
+- enable-method = "spin-table";
+- cpu-release-addr = <0x0 0x000000f0>;
+- };
+- };
+-
+- v3dbus {
+- compatible = "simple-bus";
+- #address-cells = <1>;
+- #size-cells = <2>;
+- ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>,
+- <0x40000000 0x0 0xff800000 0x0 0x00800000>;
+- dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>;
+-
+- v3d: v3d@7ec04000 {
+- compatible = "brcm,2711-v3d";
+- reg =
+- <0x7ec00000 0x0 0x4000>,
+- <0x7ec04000 0x0 0x4000>;
+- reg-names = "hub", "core0";
+-
+- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+- resets = <&pm BCM2835_RESET_V3D>;
+- clocks = <&clocks BCM2835_CLOCK_V3D>;
+- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+- status = "okay";
+- };
+- };
+-
+- scb: scb {
+- compatible = "simple-bus";
+- #address-cells = <2>;
+- #size-cells = <1>;
+-
+- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
+- <0x0 0x40000000 0x0 0xff800000 0x00800000>,
+- <0x6 0x00000000 0x6 0x00000000 0x40000000>,
+- <0x0 0x00000000 0x0 0x00000000 0xfc000000>;
+- dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>;
+-
+- pcie_0: pcie@7d500000 {
+- reg = <0x0 0x7d500000 0x9310>,
+- <0x0 0x7e00f300 0x20>;
+- msi-controller;
+- msi-parent = <&pcie_0>;
+- #address-cells = <3>;
+- #interrupt-cells = <1>;
+- #size-cells = <2>;
+- bus-range = <0x0 0x01>;
+- compatible = "brcm,bcm2711b0-pcie", // Safe value
+- "brcm,bcm2711-pcie",
+- "brcm,pci-plat-dev";
+- max-link-speed = <2>;
+- tot-num-pcie = <1>;
+- linux,pci-domain = <0>;
+- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+- interrupt-names = "pcie", "msi";
+- interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
+- IRQ_TYPE_LEVEL_HIGH
+- 0 0 0 2 &gicv2 GIC_SPI 144
+- IRQ_TYPE_LEVEL_HIGH
+- 0 0 0 3 &gicv2 GIC_SPI 145
+- IRQ_TYPE_LEVEL_HIGH
+- 0 0 0 4 &gicv2 GIC_SPI 146
+- IRQ_TYPE_LEVEL_HIGH>;
+-
+- /* Map outbound accesses from scb:0x6_00000000-03ffffff
+- * to pci:0x0_f8000000-fbffffff
+- */
+- ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
+- 0x0 0x04000000>;
+- /* Map inbound accesses from pci:0x0_00000000..ffffffff
+- * to scb:0x0_00000000-ffffffff
+- */
+- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
+- 0x1 0x00000000>;
+- status = "okay";
+- };
+-
+- genet: ethernet@7d580000 {
+- compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5";
+- reg = <0x0 0x7d580000 0x10000>;
+- #address-cells = <0x1>;
+- #size-cells = <0x1>;
+- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+- status = "disabled";
+-
+- genet_mdio: mdio@e14 {
+- #address-cells = <0x0>;
+- #size-cells = <0x1>;
+- compatible = "brcm,genet-mdio-v5";
+- reg = <0xe14 0x8>;
+- reg-names = "mdio";
+- };
+- };
+-
+- dma40: dma@7e007b00 {
+- compatible = "brcm,bcm2838-dma";
+- reg = <0x0 0x7e007b00 0x400>;
+- interrupts =
+- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 11 */
+- <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 12 */
+- <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* dma4 13 */
+- <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; /* dma4 14 */
+- interrupt-names = "dma11",
+- "dma12",
+- "dma13",
+- "dma14";
+- #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x7800>;
+- };
+- /* DMA4 - 40 bit DMA engines */
+-
+- xhci: xhci@7e9c0000 {
+- compatible = "generic-xhci";
+- status = "disabled";
+- reg = <0x0 0x7e9c0000 0x100000>;
+- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+- };
+-
+- hevc-decoder@7eb00000 {
+- compatible = "raspberrypi,rpivid-hevc-decoder";
+- reg = <0x0 0x7eb00000 0x10000>;
+- status = "okay";
+- };
+-
+- rpivid-local-intc@7eb10000 {
+- compatible = "raspberrypi,rpivid-local-intc";
+- reg = <0x0 0x7eb10000 0x1000>;
+- status = "okay";
+- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+- };
+-
+- h264-decoder@7eb20000 {
+- compatible = "raspberrypi,rpivid-h264-decoder";
+- reg = <0x0 0x7eb20000 0x10000>;
+- status = "okay";
+- };
+-
+- vp9-decoder@7eb30000 {
+- compatible = "raspberrypi,rpivid-vp9-decoder";
+- reg = <0x0 0x7eb30000 0x10000>;
+- status = "okay";
+- };
+- };
+-};
+-
+-&clk_osc {
+- clock-frequency = <54000000>;
+-};
+-
+-&clocks {
+- compatible = "brcm,bcm2711-cprman";
+-};
+-
+-&cpu_thermal {
+- coefficients = <(-487) 410040>;
+-};
+-
+-&dsi0 {
+- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&dsi1 {
+- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&gpio {
+- compatible = "brcm,bcm2711-gpio", "brcm,bcm2835-gpio";
+-
+- gpclk0_gpio49: gpclk0_gpio49 {
+- brcm,pins = <49>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- brcm,pull = <BCM2835_PUD_OFF>;
+- };
+- gpclk1_gpio50: gpclk1_gpio50 {
+- brcm,pins = <50>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- brcm,pull = <BCM2835_PUD_OFF>;
+- };
+- gpclk2_gpio51: gpclk2_gpio51 {
+- brcm,pins = <51>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- brcm,pull = <BCM2835_PUD_OFF>;
+- };
+-
+- i2c0_gpio46: i2c0_gpio46 {
+- brcm,pins = <46 47>;
+- brcm,function = <BCM2835_FSEL_ALT0>;
+- };
+- i2c1_gpio46: i2c1_gpio46 {
+- brcm,pins = <46 47>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- };
+- i2c3_gpio2: i2c3_gpio2 {
+- brcm,pins = <2 3>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c3_gpio4: i2c3_gpio4 {
+- brcm,pins = <4 5>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c4_gpio6: i2c4_gpio6 {
+- brcm,pins = <6 7>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c4_gpio8: i2c4_gpio8 {
+- brcm,pins = <8 9>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c5_gpio10: i2c5_gpio10 {
+- brcm,pins = <10 11>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c5_gpio12: i2c5_gpio12 {
+- brcm,pins = <12 13>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c6_gpio0: i2c6_gpio0 {
+- brcm,pins = <0 1>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c6_gpio22: i2c6_gpio22 {
+- brcm,pins = <22 23>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- i2c_slave_gpio8: i2c_slave_gpio8 {
+- brcm,pins = <8 9 10 11>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+-
+- jtag_gpio48: jtag_gpio48 {
+- brcm,pins = <48 49 50 51 52 53>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- };
+-
+- mii_gpio28: mii_gpio28 {
+- brcm,pins = <28 29 30 31>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- };
+- mii_gpio36: mii_gpio36 {
+- brcm,pins = <36 37 38 39>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+-
+- pcm_gpio50: pcm_gpio50 {
+- brcm,pins = <50 51 52 53>;
+- brcm,function = <BCM2835_FSEL_ALT2>;
+- };
+-
+- pwm0_gpio52: pwm0_gpio52 {
+- brcm,pins = <52>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- brcm,pull = <BCM2835_PUD_OFF>;
+- };
+- pwm1_gpio53: pwm1_gpio53 {
+- brcm,pins = <53>;
+- brcm,function = <BCM2835_FSEL_ALT1>;
+- brcm,pull = <BCM2835_PUD_OFF>;
+- };
+-
+- /* The following group consists of:
+- * RGMII_START_STOP
+- * RGMII_RX_OK
+- */
+- rgmii_gpio35: rgmii_gpio35 {
+- brcm,pins = <35 36>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- };
+- rgmii_irq_gpio34: rgmii_irq_gpio34 {
+- brcm,pins = <34>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- rgmii_irq_gpio39: rgmii_irq_gpio39 {
+- brcm,pins = <39>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- };
+- rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
+- brcm,pins = <28 29>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
+- brcm,pins = <37 38>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- };
+-
+- spi0_gpio46: spi0_gpio46 {
+- brcm,pins = <46 47 48 49>;
+- brcm,function = <BCM2835_FSEL_ALT2>;
+- };
+- spi2_gpio46: spi2_gpio46 {
+- brcm,pins = <46 47 48 49 50>;
+- brcm,function = <BCM2835_FSEL_ALT5>;
+- };
+- spi3_gpio0: spi3_gpio0 {
+- brcm,pins = <0 1 2 3>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+- spi4_gpio4: spi4_gpio4 {
+- brcm,pins = <4 5 6 7>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+- spi5_gpio12: spi5_gpio12 {
+- brcm,pins = <12 13 14 15>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+- spi6_gpio18: spi6_gpio18 {
+- brcm,pins = <18 19 20 21>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+-
+- uart2_gpio0: uart2_gpio0 {
+- brcm,pins = <0 1>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
+- };
+- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
+- brcm,pins = <2 3>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
+- };
+- uart3_gpio4: uart3_gpio4 {
+- brcm,pins = <4 5>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
+- };
+- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
+- brcm,pins = <6 7>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
+- };
+- uart4_gpio8: uart4_gpio8 {
+- brcm,pins = <8 9>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
+- };
+- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
+- brcm,pins = <10 11>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
+- };
+- uart5_gpio12: uart5_gpio12 {
+- brcm,pins = <12 13>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
+- };
+- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
+- brcm,pins = <14 15>;
+- brcm,function = <BCM2835_FSEL_ALT4>;
+- brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
+- };
+-};
+-
+-&vec {
+- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&usb {
+- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+- status = "disabled";
+-};
+-
+-&hdmi {
+- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&uart1 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi1 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi2 {
+- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&csi0 {
+- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&csi1 {
+- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&sdhci {
+- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&i2c0 {
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&i2c1 {
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&i2c2 {
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&gpio {
+- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&mailbox {
+- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&rng {
+- compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200";
+-};
+-
+-&sdhost {
+- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&system_timer {
+- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&uart0 {
+- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&dma {
+- reg = <0x7e007000 0xb00>;
+- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 7 */
+- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 8 */
+- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dmalite 9 */
+- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; /* dmalite 10 */
+- interrupt-names = "dma0",
+- "dma1",
+- "dma2",
+- "dma3",
+- "dma4",
+- "dma5",
+- "dma6",
+- "dma7",
+- "dma8",
+- "dma9",
+- "dma10";
+- brcm,dma-channel-mask = <0x07f5>;
+-};
+-
+-&txp {
+- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+-};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 16:54:31 +0000