diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.15/950-0897-drm-vc4-plane-Prevent-async-update-if-we-don-t-have-.patch')
-rw-r--r-- | target/linux/bcm27xx/patches-5.15/950-0897-drm-vc4-plane-Prevent-async-update-if-we-don-t-have-.patch | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.15/950-0897-drm-vc4-plane-Prevent-async-update-if-we-don-t-have-.patch b/target/linux/bcm27xx/patches-5.15/950-0897-drm-vc4-plane-Prevent-async-update-if-we-don-t-have-.patch new file mode 100644 index 0000000000..a6d539ecdf --- /dev/null +++ b/target/linux/bcm27xx/patches-5.15/950-0897-drm-vc4-plane-Prevent-async-update-if-we-don-t-have-.patch @@ -0,0 +1,37 @@ +From d04c74e3f30be64b0e14d7ed2b6088f91ac6ea64 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime@cerno.tech> +Date: Wed, 16 Mar 2022 16:44:45 +0100 +Subject: [PATCH] drm/vc4: plane: Prevent async update if we don't have + a dlist + +The vc4 planes are setup in hardware by creating a hardware descriptor +in a dedicated RAM. As part of the process to setup a plane in KMS, we +thus need to allocate some part of that dedicated RAM to store our +descriptor there. + +The async update path will just reuse the descriptor already allocated +for that plane and will modify it directly in RAM to match whatever has +been asked for. + +In order to do that, it will compare the descriptor for the old plane +state and the new plane state, will make sure they fit in the same size, +and check that only the position or buffer address have changed. + +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + drivers/gpu/drm/vc4/vc4_plane.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_plane.c ++++ b/drivers/gpu/drm/vc4/vc4_plane.c +@@ -1429,6 +1429,10 @@ static int vc4_plane_atomic_async_check( + + old_vc4_state = to_vc4_plane_state(plane->state); + new_vc4_state = to_vc4_plane_state(new_plane_state); ++ ++ if (!new_vc4_state->hw_dlist) ++ return -EINVAL; ++ + if (old_vc4_state->dlist_count != new_vc4_state->dlist_count || + old_vc4_state->pos0_offset != new_vc4_state->pos0_offset || + old_vc4_state->pos2_offset != new_vc4_state->pos2_offset || |