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path: root/target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch
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Diffstat (limited to 'target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch64
1 files changed, 64 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch b/target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch
new file mode 100644
index 0000000000..c7ea30c239
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.10/950-0428-bcm2835-dma-Add-bcm2835-dma-Add-DMA_WIDE_SOURCE-and-.patch
@@ -0,0 +1,64 @@
+From 7ab9c31d27699755870da3bae07b4a0f167b4284 Mon Sep 17 00:00:00 2001
+From: Dom Cobley <popcornmix@gmail.com>
+Date: Wed, 30 Dec 2020 14:51:29 +0000
+Subject: [PATCH] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and
+ DMA_WIDE_DEST flags
+
+Use (reserved) bits 24 and 25 of the dreq value
+(the second cell of the DT DMA descriptor) to request
+that wide source reads or wide dest writes are required
+
+Signed-off-by: Dom Cobley <popcornmix@gmail.com>
+---
+ drivers/dma/bcm2835-dma.c | 19 ++++++++++++++++---
+ 1 file changed, 16 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -171,6 +171,17 @@ struct bcm2835_desc {
+ #define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \
+ 0 : BCM2835_DMA_WAIT_RESP)
+
++/* A fake bit to request that the driver requires wide reads */
++#define BCM2835_DMA_WIDE_SOURCE BIT(24)
++#define WIDE_SOURCE(x) ((x & BCM2835_DMA_WIDE_SOURCE) ? \
++ BCM2835_DMA_S_WIDTH : 0)
++
++/* A fake bit to request that the driver requires wide writes */
++#define BCM2835_DMA_WIDE_DEST BIT(25)
++#define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \
++ BCM2835_DMA_D_WIDTH : 0)
++
++
+ /* debug register bits */
+ #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
+ #define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
+@@ -850,7 +861,8 @@ static struct dma_async_tx_descriptor *b
+ {
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+- u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
++ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
++ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq);
+ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;
+@@ -881,7 +893,8 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+ dma_addr_t src = 0, dst = 0;
+- u32 info = WAIT_RESP(c->dreq);
++ u32 info = WAIT_RESP(c->dreq) |
++ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ u32 extra = BCM2835_DMA_INT_EN;
+ size_t frames;
+
+@@ -943,7 +956,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+ dma_addr_t src, dst;
+- u32 info = WAIT_RESP(c->dreq);
++ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
+ u32 extra = 0;
+ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;