diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.10/950-0412-drm-vc4-Pass-the-atomic-state-to-encoder-hooks.patch')
| -rw-r--r-- | target/linux/bcm27xx/patches-5.10/950-0412-drm-vc4-Pass-the-atomic-state-to-encoder-hooks.patch | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.10/950-0412-drm-vc4-Pass-the-atomic-state-to-encoder-hooks.patch b/target/linux/bcm27xx/patches-5.10/950-0412-drm-vc4-Pass-the-atomic-state-to-encoder-hooks.patch new file mode 100644 index 0000000000..a887097301 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.10/950-0412-drm-vc4-Pass-the-atomic-state-to-encoder-hooks.patch @@ -0,0 +1,161 @@ +From a7a8569adc035cf74a3b82d00ba266ac9b249a15 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime@cerno.tech> +Date: Tue, 15 Dec 2020 16:42:36 +0100 +Subject: [PATCH] drm/vc4: Pass the atomic state to encoder hooks + +We'll need to access the connector state in our encoder setup, so let's +just pass the whole DRM state to our private encoder hooks. + +Acked-by: Thomas Zimmermann <tzimmermann@suse.de> +Signed-off-by: Maxime Ripard <maxime@cerno.tech> +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 18 ++++++++++-------- + drivers/gpu/drm/vc4/vc4_drv.h | 10 +++++----- + drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++++++++++----- + 3 files changed, 25 insertions(+), 18 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -420,7 +420,9 @@ static void require_hvs_enabled(struct d + SCALER_DISPCTRL_ENABLE); + } + +-static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel) ++static int vc4_crtc_disable(struct drm_crtc *crtc, ++ struct drm_atomic_state *state, ++ unsigned int channel) + { + struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); + struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); +@@ -452,13 +454,13 @@ static int vc4_crtc_disable(struct drm_c + mdelay(20); + + if (vc4_encoder && vc4_encoder->post_crtc_disable) +- vc4_encoder->post_crtc_disable(encoder); ++ vc4_encoder->post_crtc_disable(encoder, state); + + vc4_crtc_pixelvalve_reset(crtc); + vc4_hvs_stop_channel(dev, channel); + + if (vc4_encoder && vc4_encoder->post_crtc_powerdown) +- vc4_encoder->post_crtc_powerdown(encoder); ++ vc4_encoder->post_crtc_powerdown(encoder, state); + + return 0; + } +@@ -485,7 +487,7 @@ int vc4_crtc_disable_at_boot(struct drm_ + if (channel < 0) + return 0; + +- return vc4_crtc_disable(crtc, channel); ++ return vc4_crtc_disable(crtc, NULL, channel); + } + + static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, +@@ -501,7 +503,7 @@ static void vc4_crtc_atomic_disable(stru + /* Disable vblank irq handling before crtc is disabled. */ + drm_crtc_vblank_off(crtc); + +- vc4_crtc_disable(crtc, old_vc4_state->assigned_channel); ++ vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel); + + /* + * Make sure we issue a vblank event after disabling the CRTC if +@@ -535,14 +537,14 @@ static void vc4_crtc_atomic_enable(struc + vc4_hvs_atomic_enable(crtc, state); + + if (vc4_encoder->pre_crtc_configure) +- vc4_encoder->pre_crtc_configure(encoder); ++ vc4_encoder->pre_crtc_configure(encoder, state); + + vc4_crtc_config_pv(crtc); + + CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN); + + if (vc4_encoder->pre_crtc_enable) +- vc4_encoder->pre_crtc_enable(encoder); ++ vc4_encoder->pre_crtc_enable(encoder, state); + + /* When feeding the transposer block the pixelvalve is unneeded and + * should not be enabled. +@@ -551,7 +553,7 @@ static void vc4_crtc_atomic_enable(struc + CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN); + + if (vc4_encoder->post_crtc_enable) +- vc4_encoder->post_crtc_enable(encoder); ++ vc4_encoder->post_crtc_enable(encoder, state); + } + + static enum drm_mode_status vc4_crtc_mode_valid(struct drm_crtc *crtc, +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -449,12 +449,12 @@ struct vc4_encoder { + enum vc4_encoder_type type; + u32 clock_select; + +- void (*pre_crtc_configure)(struct drm_encoder *encoder); +- void (*pre_crtc_enable)(struct drm_encoder *encoder); +- void (*post_crtc_enable)(struct drm_encoder *encoder); ++ void (*pre_crtc_configure)(struct drm_encoder *encoder, struct drm_atomic_state *state); ++ void (*pre_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); ++ void (*post_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); + +- void (*post_crtc_disable)(struct drm_encoder *encoder); +- void (*post_crtc_powerdown)(struct drm_encoder *encoder); ++ void (*post_crtc_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state); ++ void (*post_crtc_powerdown)(struct drm_encoder *encoder, struct drm_atomic_state *state); + }; + + static inline struct vc4_encoder * +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -411,7 +411,8 @@ static void vc4_hdmi_set_infoframes(stru + vc4_hdmi_set_audio_infoframe(encoder); + } + +-static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder) ++static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder, ++ struct drm_atomic_state *state) + { + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); + +@@ -424,7 +425,8 @@ static void vc4_hdmi_encoder_post_crtc_d + HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX); + } + +-static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder) ++static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder, ++ struct drm_atomic_state *state) + { + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); + int ret; +@@ -637,7 +639,8 @@ static void vc4_hdmi_recenter_fifo(struc + "VC4_HDMI_FIFO_CTL_RECENTER_DONE"); + } + +-static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) ++static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, ++ struct drm_atomic_state *state) + { + struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); +@@ -719,7 +722,8 @@ static void vc4_hdmi_encoder_pre_crtc_co + vc4_hdmi->variant->set_timings(vc4_hdmi, mode); + } + +-static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder) ++static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder, ++ struct drm_atomic_state *state) + { + struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; + struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder); +@@ -741,7 +745,8 @@ static void vc4_hdmi_encoder_pre_crtc_en + HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N); + } + +-static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder) ++static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder, ++ struct drm_atomic_state *state) + { + struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; + struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); |