diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.10/950-0148-drm-v3d-HACK-gut-runtime-pm-for-now.patch')
| -rw-r--r-- | target/linux/bcm27xx/patches-5.10/950-0148-drm-v3d-HACK-gut-runtime-pm-for-now.patch | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.10/950-0148-drm-v3d-HACK-gut-runtime-pm-for-now.patch b/target/linux/bcm27xx/patches-5.10/950-0148-drm-v3d-HACK-gut-runtime-pm-for-now.patch new file mode 100644 index 0000000000..d986de4dd3 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.10/950-0148-drm-v3d-HACK-gut-runtime-pm-for-now.patch @@ -0,0 +1,109 @@ +From 1480a99bfef66b0c0f07c90436a873937b656ce7 Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Mon, 14 Jan 2019 15:13:17 -0800 +Subject: [PATCH] drm/v3d: HACK: gut runtime pm for now. + +Something is still unstable -- on starting a new glxgears from an idle +X11, I get an MMU violation in high addresses. The CTS also failed +quite quickly. With this, CTS progresses for an hour before OOMing +(allocating some big buffers when my board only has 600MB available to +Linux) + +Signed-off-by: Eric Anholt <eric@anholt.net> +--- + drivers/gpu/drm/v3d/v3d_debugfs.c | 16 +--------------- + drivers/gpu/drm/v3d/v3d_drv.c | 9 --------- + 2 files changed, 1 insertion(+), 24 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_debugfs.c ++++ b/drivers/gpu/drm/v3d/v3d_debugfs.c +@@ -4,7 +4,6 @@ + #include <linux/circ_buf.h> + #include <linux/ctype.h> + #include <linux/debugfs.h> +-#include <linux/pm_runtime.h> + #include <linux/seq_file.h> + + #include <drm/drm_debugfs.h> +@@ -130,11 +129,8 @@ static int v3d_v3d_debugfs_ident(struct + struct drm_device *dev = node->minor->dev; + struct v3d_dev *v3d = to_v3d_dev(dev); + u32 ident0, ident1, ident2, ident3, cores; +- int ret, core; ++ int core; + +- ret = pm_runtime_get_sync(v3d->drm.dev); +- if (ret < 0) +- return ret; + + ident0 = V3D_READ(V3D_HUB_IDENT0); + ident1 = V3D_READ(V3D_HUB_IDENT1); +@@ -187,9 +183,6 @@ static int v3d_v3d_debugfs_ident(struct + (misccfg & V3D_MISCCFG_OVRTMUOUT) != 0); + } + +- pm_runtime_mark_last_busy(v3d->drm.dev); +- pm_runtime_put_autosuspend(v3d->drm.dev); +- + return 0; + } + +@@ -217,11 +210,6 @@ static int v3d_measure_clock(struct seq_ + uint32_t cycles; + int core = 0; + int measure_ms = 1000; +- int ret; +- +- ret = pm_runtime_get_sync(v3d->drm.dev); +- if (ret < 0) +- return ret; + + if (v3d->ver >= 40) { + V3D_CORE_WRITE(core, V3D_V4_PCTR_0_SRC_0_3, +@@ -245,8 +233,6 @@ static int v3d_measure_clock(struct seq_ + cycles / (measure_ms * 1000), + (cycles / (measure_ms * 100)) % 10); + +- pm_runtime_mark_last_busy(v3d->drm.dev); +- pm_runtime_put_autosuspend(v3d->drm.dev); + + return 0; + } +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -79,7 +79,6 @@ static int v3d_get_param_ioctl(struct dr + { + struct v3d_dev *v3d = to_v3d_dev(dev); + struct drm_v3d_get_param *args = data; +- int ret; + static const u32 reg_map[] = { + [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG, + [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1, +@@ -105,17 +104,12 @@ static int v3d_get_param_ioctl(struct dr + if (args->value != 0) + return -EINVAL; + +- ret = pm_runtime_get_sync(v3d->drm.dev); +- if (ret < 0) +- return ret; + if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 && + args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) { + args->value = V3D_CORE_READ(0, offset); + } else { + args->value = V3D_READ(offset); + } +- pm_runtime_mark_last_busy(v3d->drm.dev); +- pm_runtime_put_autosuspend(v3d->drm.dev); + return 0; + } + +@@ -308,9 +302,6 @@ static int v3d_platform_drm_probe(struct + return -ENOMEM; + } + +- pm_runtime_use_autosuspend(dev); +- pm_runtime_set_autosuspend_delay(dev, 50); +- pm_runtime_enable(dev); + + ret = v3d_gem_init(drm); + if (ret) |