diff options
Diffstat (limited to 'target/linux/atheros-2.6/files/arch')
8 files changed, 256 insertions, 119 deletions
diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c index 4e1beaae38..d337098d5c 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c @@ -29,56 +29,55 @@ #include <asm/io.h> #include "ar531x.h" +#define NO_PHY 0x1f - +static int is_5312 = 0; static struct platform_device *ar5312_devs[5]; static struct resource ar5312_eth0_res[] = { { - .name = "eth_membase", + .name = "eth0_membase", .flags = IORESOURCE_MEM, .start = KSEG1ADDR(AR531X_ENET0), .end = KSEG1ADDR(AR531X_ENET0 + 0x2000), }, { - .name = "eth_irq", + .name = "eth0_irq", .flags = IORESOURCE_IRQ, .start = AR5312_IRQ_ENET0_INTRS, .end = AR5312_IRQ_ENET0_INTRS, }, }; - +static struct ar531x_eth ar5312_eth0_data = { + .phy = NO_PHY, + .mac = 0, + .reset_base = AR531X_RESET, + .reset_mac = AR531X_RESET_ENET0, + .reset_phy = AR531X_RESET_EPHY0, + .phy_base = KSEG1ADDR(AR531X_ENET0), +}; static struct resource ar5312_eth1_res[] = { { - .name = "eth_membase", + .name = "eth1_membase", .flags = IORESOURCE_MEM, .start = KSEG1ADDR(AR531X_ENET1), .end = KSEG1ADDR(AR531X_ENET1 + 0x2000), }, { - .name = "eth_irq", + .name = "eth1_irq", .flags = IORESOURCE_IRQ, .start = AR5312_IRQ_ENET1_INTRS, .end = AR5312_IRQ_ENET1_INTRS, }, }; - - -static struct ar531x_eth ar5312_eth0_data = { - .phy = 0x1f, - .mac = 0, - .reset_base = AR531X_RESET, - .reset_mac = AR531X_RESET_ENET0, - .reset_phy = AR531X_RESET_EPHY0, -}; - static struct ar531x_eth ar5312_eth1_data = { - .phy = 0, + .phy = NO_PHY, .mac = 1, .reset_base = AR531X_RESET, .reset_mac = AR531X_RESET_ENET1, .reset_phy = AR531X_RESET_EPHY1, + .phy_base = KSEG1ADDR(AR531X_ENET1), }; static struct platform_device ar5312_eth[] = { @@ -98,6 +97,42 @@ static struct platform_device ar5312_eth[] = { }, }; + +/* + * AR2312/3 ethernet uses the PHY of ENET0, but the MAC + * of ENET1. Atheros calls it 'twisted' for a reason :) + */ +static struct resource ar231x_eth0_res[] = { + { + .name = "eth0_membase", + .flags = IORESOURCE_MEM, + .start = KSEG1ADDR(AR531X_ENET1), + .end = KSEG1ADDR(AR531X_ENET1 + 0x2000), + }, + { + .name = "eth0_irq", + .flags = IORESOURCE_IRQ, + .start = AR5312_IRQ_ENET1_INTRS, + .end = AR5312_IRQ_ENET1_INTRS, + }, +}; +static struct ar531x_eth ar231x_eth0_data = { + .phy = 1, + .mac = 1, + .reset_base = AR531X_RESET, + .reset_mac = AR531X_RESET_ENET1, + .reset_phy = AR531X_RESET_EPHY1, + .phy_base = KSEG1ADDR(AR531X_ENET0), +}; +static struct platform_device ar231x_eth0 = { + .id = 0, + .name = "ar531x-eth", + .dev.platform_data = &ar231x_eth0_data, + .resource = ar231x_eth0_res, + .num_resources = ARRAY_SIZE(ar231x_eth0_res) +}; + + static struct platform_device ar5312_wmac[] = { { .id = 0, @@ -109,7 +144,6 @@ static struct platform_device ar5312_wmac[] = { }, }; - static struct physmap_flash_data ar5312_flash_data = { .width = 2, }; @@ -139,7 +173,10 @@ static struct platform_device ar5312_physmap_flash = { static char __init *ar5312_flash_limit(void) { u32 ctl; - /* Configure flash bank 0 */ + /* + * Configure flash bank 0. + * Assume 8M window size. Flash will be aliased if it's smaller + */ ctl = FLASHCTL_E | FLASHCTL_AC_8M | FLASHCTL_RBLE | @@ -157,7 +194,7 @@ static char __init *ar5312_flash_limit(void) sysRegWrite(AR531X_FLASHCTL2, sysRegRead(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC)); - return (char *) KSEG1ADDR(AR531X_FLASH + 0x400000); + return (char *) KSEG1ADDR(AR531X_FLASH + 0x800000); } static struct ar531x_config __init *init_wmac(int unit) @@ -175,27 +212,80 @@ static struct ar531x_config __init *init_wmac(int unit) int __init ar5312_init_devices(void) { - char *radio; + struct ar531x_boarddata *bcfg; + char *radio, *c; int dev = 0; - if (mips_machtype != MACH_ATHEROS_AR5312) + if (!is_5312) return 0; + /* Locate board/radio config data */ ar531x_find_config(ar5312_flash_limit()); + bcfg = (struct ar531x_boarddata *) board_config; + + + /* + * Chip IDs and hardware detection for some Atheros + * models are really broken! + * + * Atheros uses a disabled WMAC0 and Silicon ID of AR5312 + * as indication for AR2312, which is otherwise + * indistinguishable from the real AR5312. + */ + if (radio_config) { + radio = radio_config + AR531X_RADIO_MASK_OFF; + if ((*((u32 *) radio) & AR531X_RADIO0_MASK) == 0) + bcfg->config |= BD_ISCASPER; + } else + radio = NULL; + + /* AR2313 has CPU minor rev. 10 */ + if ((current_cpu_data.processor_id & 0xff) == 0x0a) + mips_machtype = MACH_ATHEROS_AR2313; + + /* AR2312 shares the same Silicon ID as AR5312 */ + else if (bcfg->config & BD_ISCASPER) + mips_machtype = MACH_ATHEROS_AR2312; + + /* Everything else is probably AR5312 or compatible */ + else + mips_machtype = MACH_ATHEROS_AR5312; + ar5312_eth0_data.board_config = board_config; ar5312_eth1_data.board_config = board_config; ar5312_devs[dev++] = &ar5312_physmap_flash; - ar5312_devs[dev++] = &ar5312_eth[0]; - ar5312_devs[dev++] = &ar5312_eth[1]; - radio = radio_config + AR531X_RADIO_MASK_OFF; - if (*((u32 *) radio) & AR531X_RADIO0_MASK) { - ar5312_wmac[0].dev.platform_data = init_wmac(0); - ar5312_devs[dev++] = &ar5312_wmac[0]; + ar5312_eth0_data.macaddr = bcfg->enet0Mac; + ar5312_eth1_data.macaddr = bcfg->enet1Mac; + if (memcmp(bcfg->enet0Mac, bcfg->enet1Mac, 6) == 0) { + /* ENET0 and ENET1 have the same mac. + * Increment the one from ENET1 */ + c = bcfg->enet1Mac + 5; + while ((c >= (char *) bcfg->enet1Mac) && !(++(*c))) + c--; + } + + switch(mips_machtype) { + case MACH_ATHEROS_AR5312: + ar5312_devs[dev++] = &ar5312_eth[0]; + ar5312_devs[dev++] = &ar5312_eth[1]; + break; + case MACH_ATHEROS_AR2312: + case MACH_ATHEROS_AR2313: + ar5312_devs[dev++] = &ar231x_eth0; + ar5312_flash_data.width = 1; + break; } - if (*((u32 *) radio) & AR531X_RADIO1_MASK) { - ar5312_wmac[1].dev.platform_data = init_wmac(1); - ar5312_devs[dev++] = &ar5312_wmac[1]; + + if (radio) { + if (*((u32 *) radio) & AR531X_RADIO0_MASK) { + ar5312_wmac[0].dev.platform_data = init_wmac(0); + ar5312_devs[dev++] = &ar5312_wmac[0]; + } + if (*((u32 *) radio) & AR531X_RADIO1_MASK) { + ar5312_wmac[1].dev.platform_data = init_wmac(1); + ar5312_devs[dev++] = &ar5312_wmac[1]; + } } return platform_add_devices(ar5312_devs, dev); @@ -445,6 +535,25 @@ void __init ar5312_misc_intr_init(int irq_base) setup_irq(AR5312_IRQ_MISC_INTRS, &cascade); } +void __init ar5312_prom_init(void) +{ + u32 memsize, memcfg, bank0AC, bank1AC; + + is_5312 = 1; + + /* Detect memory size */ + memcfg = sysRegRead(AR531X_MEM_CFG1); + bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S; + bank1AC = (memcfg & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S; + memsize = (bank0AC ? (1 << (bank0AC+1)) : 0) + + (bank1AC ? (1 << (bank1AC+1)) : 0); + memsize <<= 20; + add_memory_region(0, memsize, BOOT_MEM_RAM); + + /* Initialize it to AR5312 for now. Real detection will be done + * in ar5312_init_devices() */ + mips_machtype = MACH_ATHEROS_AR5312; +} void __init ar5312_plat_setup(void) { diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.h b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.h index 62d5797933..2b6b875b4f 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.h +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.h @@ -164,7 +164,7 @@ #define AR531X_REV_MAJ_S 4 #define AR531X_REV_MIN 0x000f #define AR531X_REV_MIN_S 0 -#define AR531X_REV_CHIP (REV_MAJ|REV_MIN) +#define AR531X_REV_CHIP (AR531X_REV_MAJ|AR531X_REV_MIN) /* Major revision numbers, bits 7..4 of Revision ID register */ #define AR531X_REV_MAJ_AR5312 0x4 diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.c b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.c index b0db7c1d02..4e09fe01f0 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.c @@ -28,15 +28,16 @@ #include <asm/io.h> #include "ar531x.h" +static int is_5315 = 0; static struct resource ar5315_eth_res[] = { { - .name = "eth_membase", + .name = "eth0_membase", .flags = IORESOURCE_MEM, .start = AR5315_ENET0, .end = AR5315_ENET0 + 0x2000, }, { - .name = "eth_irq", + .name = "eth0_irq", .flags = IORESOURCE_IRQ, .start = AR5315_IRQ_ENET0_INTRS, .end = AR5315_IRQ_ENET0_INTRS, @@ -49,6 +50,7 @@ static struct ar531x_eth ar5315_eth_data = { .reset_base = AR5315_RESET, .reset_mac = AR5315_RESET_ENET0, .reset_phy = AR5315_RESET_EPHY0, + .phy_base = AR5315_ENET0 }; static struct platform_device ar5315_eth = { @@ -175,20 +177,40 @@ static char __init *ar5315_flash_limit(void) int __init ar5315_init_devices(void) { struct ar531x_config *config; + struct ar531x_boarddata *bcfg; + u32 devid; int dev = 0; - if (mips_machtype != MACH_ATHEROS_AR5315) + if (!is_5315) return 0; + /* Find board configuration */ ar531x_find_config(ar5315_flash_limit()); + bcfg = (struct ar531x_boarddata *) board_config; + +#if 0 + /* Detect the hardware based on the device ID */ + devid = sysRegRead(AR5315_SREV) & AR5315_REV_MAJ >> AR5315_REV_MAJ_S; + switch(devid) { + case 0x9: + mips_machtype = MACH_ATHEROS_AR2317; + break; + /* FIXME: how can we detect AR2316? */ + case 0x8: + default: + mips_machtype = MACH_ATHEROS_AR2315; + break; + } +#endif config = (struct ar531x_config *) kzalloc(sizeof(struct ar531x_config), GFP_KERNEL); config->board = board_config; config->radio = radio_config; config->unit = 0; - config->tag = (u_int16_t) (sysRegRead(AR5315_SREV) & REV_CHIP); + config->tag = (u_int16_t) (sysRegRead(AR5315_SREV) & AR5315_REV_CHIP); ar5315_eth_data.board_config = board_config; + ar5315_eth_data.macaddr = bcfg->enet0Mac; ar5315_wmac.dev.platform_data = config; ar5315_devs[dev++] = &ar5315_eth; @@ -379,8 +401,6 @@ ar5315_misc_intr_enable(unsigned int irq) } sysRegWrite(AR5315_IMR, imr); imr=sysRegRead(AR5315_IMR); /* flush write buffer */ - //printk("enable Interrupt irq 0x%x imr 0x%x \n",irq,imr); - } /* Disable the specified AR531X_MISC_IRQ interrupt */ @@ -501,6 +521,23 @@ void ar5315_misc_intr_init(int irq_base) setup_irq(AR5315_IRQ_MISC_INTRS, &cascade); } +void __init ar5315_prom_init(void) +{ + u32 memsize, memcfg; + + is_5315 = 1; + memcfg = sysRegRead(AR5315_MEM_CFG); + memsize = 1 + ((memcfg & SDRAM_DATA_WIDTH_M) >> SDRAM_DATA_WIDTH_S); + memsize <<= 1 + ((memcfg & SDRAM_COL_WIDTH_M) >> SDRAM_COL_WIDTH_S); + memsize <<= 1 + ((memcfg & SDRAM_ROW_WIDTH_M) >> SDRAM_ROW_WIDTH_S); + memsize <<= 3; + add_memory_region(0, memsize, BOOT_MEM_RAM); + + /* Initialize it to AR2315 for now. Real detection will be done + * in ar5315_init_devices() */ + mips_machtype = MACH_ATHEROS_AR2315; +} + void __init ar5315_plat_setup(void) { unsigned int config = read_c0_config(); diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.h b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.h index ef2df8778d..c3eeed18b8 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.h +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5315.h @@ -121,11 +121,11 @@ */ #define AR5315_SREV (AR5315_DSLBASE + 0x0014) -#define REV_MAJ 0x00f0 -#define REV_MAJ_S 4 -#define REV_MIN 0x000f -#define REV_MIN_S 0 -#define REV_CHIP (REV_MAJ|REV_MIN) +#define AR5315_REV_MAJ 0x00f0 +#define AR5315_REV_MAJ_S 4 +#define AR5315_REV_MIN 0x000f +#define AR5315_REV_MIN_S 0 +#define AR5315_REV_CHIP (AR5315_REV_MAJ|AR5315_REV_MIN) /* * Interface Enable @@ -359,21 +359,21 @@ #define AR5315_PCICLK (AR5315_DSLBASE + 0x00a4) -#define PCICLK_INPUT_M 0x3 -#define PCICLK_INPUT_S 0 +#define AR5315_PCICLK_INPUT_M 0x3 +#define AR5315_PCICLK_INPUT_S 0 -#define PCICLK_PLLC_CLKM 0 -#define PCICLK_PLLC_CLKM1 1 -#define PCICLK_PLLC_CLKC 2 -#define PCICLK_REF_CLK 3 +#define AR5315_PCICLK_PLLC_CLKM 0 +#define AR5315_PCICLK_PLLC_CLKM1 1 +#define AR5315_PCICLK_PLLC_CLKC 2 +#define AR5315_PCICLK_REF_CLK 3 -#define PCICLK_DIV_M 0xc -#define PCICLK_DIV_S 2 +#define AR5315_PCICLK_DIV_M 0xc +#define AR5315_PCICLK_DIV_S 2 -#define PCICLK_IN_FREQ 0 -#define PCICLK_IN_FREQ_DIV_6 1 -#define PCICLK_IN_FREQ_DIV_8 2 -#define PCICLK_IN_FREQ_DIV_10 3 +#define AR5315_PCICLK_IN_FREQ 0 +#define AR5315_PCICLK_IN_FREQ_DIV_6 1 +#define AR5315_PCICLK_IN_FREQ_DIV_8 2 +#define AR5315_PCICLK_IN_FREQ_DIV_10 3 /* * Observation Control Register diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar531x.h b/target/linux/atheros-2.6/files/arch/mips/atheros/ar531x.h index 208b0101a2..471cc7e7dc 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar531x.h +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar531x.h @@ -1,10 +1,34 @@ #ifndef __AR531X_H #define __AR531X_H +#include <asm/cpu-info.h> #include <ar531x_platform.h> #include "ar5312.h" #include "ar5315.h" +/* + * Atheros CPUs before the AR2315 are using MIPS 4Kc core, later designs are + * using MIPS 4KEc R2 core. This makes it easy to determine the board at runtime. + */ +#ifdef CONFIG_ATHEROS_AR5312 +#define DO_AR5312(...) \ + if (current_cpu_data.cputype != CPU_4KEC) { \ + __VA_ARGS__ \ + } +#else +#define DO_AR5312(...) +#endif +#ifdef CONFIG_ATHEROS_AR5315 +#define DO_AR5315(...) \ + if (current_cpu_data.cputype == CPU_4KEC) { \ + __VA_ARGS__ \ + } +#else +#define DO_AR5315(...) +#endif + + + #define MIPS_CPU_IRQ_BASE 0x00 #define AR531X_HIGH_PRIO 0x10 #define AR531X_MISC_IRQ_BASE 0x20 @@ -89,18 +113,20 @@ struct ar531x_boarddata { u8 wlan1Mac[6]; /* (ar5212) */ }; +#define BOARD_CONFIG_BUFSZ 0x1000 -extern char *board_config; -extern char *radio_config; +extern char *board_config, *radio_config; extern void serial_setup(unsigned long mapbase, unsigned int uartclk); extern int ar531x_find_config(char *flash_limit); +extern void ar5312_prom_init(void); extern void ar5312_misc_intr_init(int irq_base); -extern void ar5312_irq_dispatch(void); extern void ar5312_plat_setup(void); +extern asmlinkage void ar5312_irq_dispatch(void); +extern void ar5315_prom_init(void); extern void ar5315_misc_intr_init(int irq_base); -extern asmlinkage void ar5315_irq_dispatch(void); extern void ar5315_plat_setup(void); +extern asmlinkage void ar5315_irq_dispatch(void); #endif diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/board.c b/target/linux/atheros-2.6/files/arch/mips/atheros/board.c index fe94c3ffc1..7913d8dbd8 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/board.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/board.c @@ -106,7 +106,7 @@ int __init ar531x_find_config(char *flash_limit) if (!bcfg) return -ENODEV; - board_config = kmalloc(0x1000, GFP_KERNEL); + board_config = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL); memcpy(board_config, bcfg, 0x100); /* Radio config starts 0x100 bytes after board config, regardless @@ -116,9 +116,9 @@ int __init ar531x_find_config(char *flash_limit) if (!rcfg) return -ENODEV; - printk("Radio config found at offset 0x%x\n", rcfg - bcfg); radio_config = board_config + 0x100 + ((rcfg - bcfg) & 0xfff); - rcfg_size = 0x1000 - ((rcfg - bcfg) & 0xfff); + printk("Radio config found at offset 0x%x(0x%x)\n", rcfg - bcfg, radio_config - board_config); + rcfg_size = BOARD_CONFIG_BUFSZ - ((rcfg - bcfg) & (BOARD_CONFIG_BUFSZ - 1)); memcpy(radio_config, rcfg, rcfg_size); return 0; @@ -143,18 +143,8 @@ void __init serial_setup(unsigned long mapbase, unsigned int uartclk) void __init plat_mem_setup(void) { - switch(mips_machtype) { -#ifdef CONFIG_ATHEROS_AR5312 - case MACH_ATHEROS_AR5312: - ar5312_plat_setup(); - break; -#endif -#ifdef CONFIG_ATHEROS_AR5315 - case MACH_ATHEROS_AR5315: - ar5315_plat_setup(); - break; -#endif - } + DO_AR5312(ar5312_plat_setup();) + DO_AR5315(ar5315_plat_setup();) /* Disable data watchpoints */ write_c0_watchlo0(0); @@ -166,10 +156,22 @@ const char *get_system_type(void) #ifdef CONFIG_ATHEROS_AR5312 case MACH_ATHEROS_AR5312: return "Atheros AR5312\n"; + + case MACH_ATHEROS_AR2312: + return "Atheros AR2312\n"; + + case MACH_ATHEROS_AR2313: + return "Atheros AR2313\n"; #endif #ifdef CONFIG_ATHEROS_AR5315 - case MACH_ATHEROS_AR5315: - return "Atheros AR5315\n"; + case MACH_ATHEROS_AR2315: + return "Atheros AR2315\n"; + case MACH_ATHEROS_AR2316: + return "Atheros AR2316\n"; + case MACH_ATHEROS_AR2317: + return "Atheros AR2317\n"; + case MACH_ATHEROS_AR2318: + return "Atheros AR2318\n"; #endif } return "Atheros (unknown)"; diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/irq.c b/target/linux/atheros-2.6/files/arch/mips/atheros/irq.c index 99d960b417..052dbc1d23 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/irq.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/irq.c @@ -67,14 +67,8 @@ static struct irqaction spurious_misc = { asmlinkage void plat_irq_dispatch(void) { -#ifdef CONFIG_ATHEROS_AR5312 - if (mips_machtype == MACH_ATHEROS_AR5312) - ar5312_irq_dispatch(); -#endif -#ifdef CONFIG_ATHEROS_AR5315 - if (mips_machtype == MACH_ATHEROS_AR5315) - ar5315_irq_dispatch(); -#endif + DO_AR5312(ar5312_irq_dispatch();) + DO_AR5315(ar5315_irq_dispatch();) } void __init arch_init_irq(void) @@ -83,14 +77,8 @@ void __init arch_init_irq(void) mips_cpu_irq_init(0); /* Initialize interrupt controllers */ -#ifdef CONFIG_ATHEROS_AR5312 - if (mips_machtype == MACH_ATHEROS_AR5312) - ar5312_misc_intr_init(AR531X_MISC_IRQ_BASE); -#endif -#ifdef CONFIG_ATHEROS_AR5315 - if (mips_machtype == MACH_ATHEROS_AR5315) - ar5315_misc_intr_init(AR531X_MISC_IRQ_BASE); -#endif + DO_AR5312(ar5312_misc_intr_init(AR531X_MISC_IRQ_BASE);) + DO_AR5315(ar5315_misc_intr_init(AR531X_MISC_IRQ_BASE);) /* Default "spurious interrupt" handlers */ setup_irq(AR531X_IRQ_NONE, &spurious_irq); diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/prom.c b/target/linux/atheros-2.6/files/arch/mips/atheros/prom.c index 6dfa13c77d..5a4ee63b2c 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/prom.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/prom.c @@ -27,38 +27,13 @@ void __init prom_init(void) { - u32 memsize, memcfg; mips_machgroup = MACH_GROUP_ATHEROS; mips_machtype = -1; - /* - * Atheros CPUs before the AR2315 are using MIPS 4Kc core, later designs are - * using MIPS 4KEc R2 core. This makes it easy to determine the board at runtime. - */ - - if (current_cpu_data.cputype == CPU_4KEC) { - mips_machtype = MACH_ATHEROS_AR5315; - - memcfg = sysRegRead(AR5315_MEM_CFG); - memsize = 1 + ((memcfg & SDRAM_DATA_WIDTH_M) >> SDRAM_DATA_WIDTH_S); - memsize <<= 1 + ((memcfg & SDRAM_COL_WIDTH_M) >> SDRAM_COL_WIDTH_S); - memsize <<= 1 + ((memcfg & SDRAM_ROW_WIDTH_M) >> SDRAM_ROW_WIDTH_S); - memsize <<= 3; - } else { - int bank0AC, bank1AC; + DO_AR5312(ar5312_prom_init();) + DO_AR5315(ar5315_prom_init();) - mips_machtype = MACH_ATHEROS_AR5312; - - memcfg = sysRegRead(AR531X_MEM_CFG1); - bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S; - bank1AC = (memcfg & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S; - memsize = (bank0AC ? (1 << (bank0AC+1)) : 0) - + (bank1AC ? (1 << (bank1AC+1)) : 0); - memsize <<= 20; - } - - add_memory_region(0, memsize, BOOT_MEM_RAM); strcpy(arcs_cmdline, "console=ttyS0,9600 rootfstype=squashfs,jffs2"); } |