diff options
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r-- | target/linux/ath79/dts/ar9344_dlink_dir-825-c1.dts | 79 | ||||
-rw-r--r-- | target/linux/ath79/dts/ar9344_dlink_dir-835-a1.dts | 47 | ||||
-rw-r--r-- | target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi | 151 |
3 files changed, 277 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9344_dlink_dir-825-c1.dts b/target/linux/ath79/dts/ar9344_dlink_dir-825-c1.dts new file mode 100644 index 0000000000..89603aaff6 --- /dev/null +++ b/target/linux/ath79/dts/ar9344_dlink_dir-825-c1.dts @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "ar9344_dlink_dir-8x5.dtsi" + +/ { + model = "D-LINK DIR-825 C1"; + compatible = "dlink,dir-825-c1", "qca,ar9344"; + + aliases { + led-boot = &orange_power; + led-failsafe = &orange_power; + led-running = &blue_power; + led-upgrade = &orange_power; + serial0 = &uart; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-names = "default"; + pinctrl-0 = <&enable_gpio_11>; + + blue_power: blue_power { + label = "d-link:blue:power"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + + blue_usb { + label = "d-link:blue:usb"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port1>; + }; + + blue_wan { + label = "d-link:blue:wan"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + + blue_wlan2g { + label = "d-link:blue:wlan2g"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + blue_wps { + label = "d-link:blue:wps"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + orange_power: orange_power { + label = "d-link:orange:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + orange_wan { + label = "d-link:orange:wan"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + }; + + leds-ath9k { + compatible = "gpio-leds"; + + blue_wlan5g { + label = "d-link:blue:wlan5g"; + gpios = <&ath9k 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; + +&pinmux { + enable_gpio_11: pinmux_enable_gpio_11 { + pinctrl-single,bits = <0x8 0x0 0xff000000>; + }; +}; + diff --git a/target/linux/ath79/dts/ar9344_dlink_dir-835-a1.dts b/target/linux/ath79/dts/ar9344_dlink_dir-835-a1.dts new file mode 100644 index 0000000000..4f0c1e58ee --- /dev/null +++ b/target/linux/ath79/dts/ar9344_dlink_dir-835-a1.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "ar9344_dlink_dir-8x5.dtsi" + +/ { + model = "D-LINK DIR-835 A1"; + compatible = "dlink,dir-835-a1", "qca,ar9344"; + + aliases { + led-boot = &orange_power; + led-failsafe = &orange_power; + led-running = &green_power; + led-upgrade = &orange_power; + serial0 = &uart; + }; + + leds { + compatible = "gpio-leds"; + + green_power: green_power { + label = "d-link:green:power"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + + green_wan { + label = "d-link:green:wan"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + + green_wps { + label = "d-link:green:wps"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + orange_power: orange_power { + label = "d-link:orange:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + orange_wan { + label = "d-link:orange:wan"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + }; +}; + diff --git a/target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi b/target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi new file mode 100644 index 0000000000..b49d3458fe --- /dev/null +++ b/target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +#include "ar9344.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + linux,code = <KEY_RESTART>; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + linux,code = <KEY_WPS_BUTTON>; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +ð0 { + status = "okay"; + + /* default for ar934x, except for 1000M */ + pll-data = <0x06000000 0x00000101 0x00001616>; + + phy-mode = "rgmii"; + phy-handle = <&phy0>; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + qca,ar8327-initvals = < + /* GPL code drop (bsp.h & athrs17_phy.c) */ + 0x10 0xc1000000 /* PWS_REG_VALUE */ + 0x04 0x07600000 /* PORT0 PAD Mode */ + 0x0c 0x01000000 /* PORT6 PAD Mode */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x0000007e /* PORT6_STATUS */ + >; + }; +}; + +&pcie { + status = "okay"; + + ath9k: wifi@0,0 { + compatible = "pci168c,0030"; + reg = <0x0000 0 0 0 0>; + qca,no-eeprom; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&ref { + clock-frequency = <40000000>; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x000000 0x010000>; + read-only; + }; + + partition@10000 { + label = "nvram"; + reg = <0x010000 0x010000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x020000 0xF90000>; + compatible = "denx,uimage"; + }; + + partition@fb0000 { + label = "lang"; + reg = <0xfb0000 0x030000>; + read-only; + }; + + partition@fe0000 { + label = "mac"; + reg = <0xfe0000 0x010000>; + read-only; + }; + + partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&usb { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hub_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&wmac { + status = "okay"; + qca,no-eeprom; +}; + |