diff options
Diffstat (limited to 'target/linux/at91/patches-5.15/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch')
-rw-r--r-- | target/linux/at91/patches-5.15/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.15/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch b/target/linux/at91/patches-5.15/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch new file mode 100644 index 0000000000..6ce49e67ff --- /dev/null +++ b/target/linux/at91/patches-5.15/169-media-atmel-atmel-isc-add-HIS-to-register-offsets.patch @@ -0,0 +1,99 @@ +From 8c19aa14b8303a0e7c4bae42f3f00f9a2a65b0db Mon Sep 17 00:00:00 2001 +From: Eugen Hristev <eugen.hristev@microchip.com> +Date: Tue, 13 Apr 2021 12:57:11 +0200 +Subject: [PATCH 169/247] media: atmel: atmel-isc: add HIS to register offsets + +The HIS submodule is a part of the atmel-isc pipeline, and stands for +Histogram. This module performs a color histogram that can be read and used +by the main processor. +Add his to the reg offsets struct. +This will allow different products to have a different reg offset for this +particular module. + +Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> +Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> +Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> +--- + drivers/media/platform/atmel/atmel-isc-base.c | 11 +++++++---- + drivers/media/platform/atmel/atmel-isc-regs.h | 2 ++ + drivers/media/platform/atmel/atmel-isc.h | 2 ++ + drivers/media/platform/atmel/atmel-sama5d2-isc.c | 1 + + 4 files changed, 12 insertions(+), 4 deletions(-) + +--- a/drivers/media/platform/atmel/atmel-isc-base.c ++++ b/drivers/media/platform/atmel/atmel-isc-base.c +@@ -686,12 +686,13 @@ static void isc_set_histogram(struct isc + struct isc_ctrls *ctrls = &isc->ctrls; + + if (enable) { +- regmap_write(regmap, ISC_HIS_CFG, ++ regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, + ISC_HIS_CFG_MODE_GR | + (isc->config.sd_format->cfa_baycfg + << ISC_HIS_CFG_BAYSEL_SHIFT) | + ISC_HIS_CFG_RAR); +- regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_EN); ++ regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, ++ ISC_HIS_CTRL_EN); + regmap_write(regmap, ISC_INTEN, ISC_INT_HISDONE); + ctrls->hist_id = ISC_HIS_CFG_MODE_GR; + isc_update_profile(isc); +@@ -700,7 +701,8 @@ static void isc_set_histogram(struct isc + ctrls->hist_stat = HIST_ENABLED; + } else { + regmap_write(regmap, ISC_INTDIS, ISC_INT_HISDONE); +- regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_DIS); ++ regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, ++ ISC_HIS_CTRL_DIS); + + ctrls->hist_stat = HIST_DISABLED; + } +@@ -1836,7 +1838,8 @@ static void isc_awb_work(struct work_str + ctrls->awb = ISC_WB_NONE; + } + } +- regmap_write(regmap, ISC_HIS_CFG, hist_id | baysel | ISC_HIS_CFG_RAR); ++ regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, ++ hist_id | baysel | ISC_HIS_CFG_RAR); + isc_update_profile(isc); + /* if awb has been disabled, we don't need to start another histogram */ + if (ctrls->awb) +--- a/drivers/media/platform/atmel/atmel-isc-regs.h ++++ b/drivers/media/platform/atmel/atmel-isc-regs.h +@@ -224,6 +224,8 @@ + #define ISC_RLP_CFG_MODE_YYCC_LIMITED 0xc + #define ISC_RLP_CFG_MODE_MASK GENMASK(3, 0) + ++/* Offset for HIS register specific to sama5d2 product */ ++#define ISC_SAMA5D2_HIS_OFFSET 0 + /* Histogram Control Register */ + #define ISC_HIS_CTRL 0x000003d4 + +--- a/drivers/media/platform/atmel/atmel-isc.h ++++ b/drivers/media/platform/atmel/atmel-isc.h +@@ -150,6 +150,7 @@ struct isc_ctrls { + * @sub422: Offset for the SUB422 register + * @sub420: Offset for the SUB420 register + * @rlp: Offset for the RLP register ++ * @his: Offset for the HIS related registers + */ + struct isc_reg_offsets { + u32 csc; +@@ -157,6 +158,7 @@ struct isc_reg_offsets { + u32 sub422; + u32 sub420; + u32 rlp; ++ u32 his; + }; + + /* +--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c ++++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c +@@ -256,6 +256,7 @@ static int atmel_isc_probe(struct platfo + isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET; + isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET; + isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET; ++ isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET; + + /* sama5d2-isc - 8 bits per beat */ + isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; |